Hi Mike,
It's the former. The trouble is I have around twelve possible sources of interrupt all going into the same pin and I don't want to miss any. This means after I get an interrupt caused by the edge of the first one, I have to then go and see if there have been any others (this is all done with an FPGA as the source, so I can look at the register in in FPGA to see what interrupts are pending). However, it is still possible to miss an interrupt if I get one between when I've done a poll at the end of the old interrupt and returning to the background. In the past I've made psuedo level driven interrupts by gating the interrupts with a square wave so that it keeps knocking at the PIC's door till it gets serviced.