8051 interrupt in interrupt

[blueskull]

Quick question: during an ISR is being executed (from interrupt to RETI), can THE SAME interrupt be raised and served and interrupting the current ISR?

I ask this because I know there is this interrupt priority system in 8051, where higher level interrupts can interrupt a lower level ISR, and another interrupt of the same level or lower level interrupts cannot. But there's no clear way stating whether the same interrupt can interrupt its own ISR.

I observed this on CH552, and I'd like to know if this is normal in 8051, or should I call WCH and report a silicon bug.

[Jeroen3]

Only if you change the priority inside said interrupt I suspect.
There are two interrupt levels. Default all interrupts are the same. Only higher interrupt priority can nest.

[Wilksey]

I would suspect it depends on when you clear the interrupt but you could get into a sticky mess if you do not use priorities.

[Jeroen3]

I would suspect it depends on when you clear the interrupt but you could get into a sticky mess if you do not use priorities.

Interrupt flags are latched until RETI.

[PCB.Wiz]

I observed this on CH552, and I'd like to know if this is normal in 8051, or should I call WCH and report a silicon bug.

What exactly did you observe ?

Until a RETI occurs, the same interrupt should not be possible to re-enter.

Usually, that RETI is at the end of the interrupt, but in very rare and special cases, with extreme care when using assembler, you can call an early RETI, which resets the interrupt state engine, but continues one longer/rare fork of the interrupt code. 

[oPossum]

I am not touching the USB interrupt enable in the ISR and everything works as expected. Debugging is with blocking bit-bang UART at 3 Mbps.