Author Topic: STM32F401 hard fault at boot time  (Read 116 times)

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Offline old gregg

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STM32F401 hard fault at boot time
« on: Today at 06:45:50 pm »
HI,

I'm having an issue with a stm32F401CCU6. The MCU crashes right after the "SystemInit" called at startup. I stepped through the  SetSysClock() with no issues. Once the function is done, it goes in the hardfault_handler interrupt.

Code: [Select]
void SystemInit(void)
{
  /* FPU settings ------------------------------------------------------------*/
  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
    SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2));  /* set CP10 and CP11 Full Access */
  #endif
  /* Reset the RCC clock configuration to the default reset state ------------*/
  /* Set HSION bit */
  RCC->CR |= (uint32_t)0x00000001;

  /* Reset CFGR register */
  RCC->CFGR = 0x00000000;

  /* Reset HSEON, CSSON and PLLON bits */
  RCC->CR &= (uint32_t)0xFEF6FFFF;

  /* Reset PLLCFGR register */
  RCC->PLLCFGR = 0x24003010;

  /* Reset HSEBYP bit */
  RCC->CR &= (uint32_t)0xFFFBFFFF;

  /* Disable all interrupts */
  RCC->CIR = 0x00000000;

#ifdef DATA_IN_ExtSRAM
  SystemInit_ExtMemCtl();
#endif /* DATA_IN_ExtSRAM */
         
  /* Configure the System clock source, PLL Multiplier and Divider factors,
     AHB/APBx prescalers and Flash settings ----------------------------------*/
  SetSysClock();

  /* Configure the Vector Table location add offset address ------------------*/
#ifdef VECT_TAB_SRAM
  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
#else
  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
#endif
}

At first I though this was a badly configure location to the flash VTOR register above. But the code seems to be correct by default and the map file gives the correct locations

Code: [Select]
Memory Configuration

Name             Origin             Length             Attributes
FLASH            0x0000000008000000 0x0000000000040000 xr
RAM              0x0000000020000000 0x0000000000010000 xrw
MEMORY_B1        0x0000000060000000 0x0000000000000000 xr
CCMRAM           0x0000000010000000 0x0000000000010000 rw
*default*        0x0000000000000000 0xffffffffffffffff
.

I'm open to suggestion, it's very frustrating it's the first time I'm having issues like this with STM32.
thanks



 

Online ataradov

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Re: STM32F401 hard fault at boot time
« Reply #1 on: Today at 06:54:01 pm »
First of all, step though the assembly and see if there is a specific instruction that causes the issue.
And then check the values of the following registers:

SCB->CFSR;  // Configurable Fault Status Register (MMSR, BFSR and UFSR)
SCB->HFSR;  // Hard Fault Status Register
SCB->DFSR;  // Debug Fault Status Register
SCB->MMFAR; // MemManage Fault Address Register
SCB->BFAR;  // Bus Fault Address Register
SCB->AFSR;  // Auxiliary Fault Status Register

Those registers will contain quite a bit of information about the fault.
Alex
 

Offline old gregg

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Re: STM32F401 hard fault at boot time
« Reply #2 on: Today at 08:07:48 pm »
Hi Ataradov !

here are the register,

CFSR : INVSTATE
HFSR : FORCED
DFSR : VCATCH | HALTED
MMFAR : 0xe000edf8

precise data Violation (PRECISERR)
BFAR : 0x20010000 (is it in RAM ?)

the chip is :
SRAM size : 64KiB
FLASH size : 256KiB
chip id : 00000423
Core id : 2ba01477


« Last Edit: Today at 08:15:24 pm by old gregg »
 

Online ataradov

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Re: STM32F401 hard fault at boot time
« Reply #3 on: Today at 08:19:13 pm »
INVSTATE means that something tried to jump to a non-thumb code.

The addresses 0xe000edf8 and 0x20010000 are suspicious. Especially the first one. The second one - it looks like some instruction is trying to do something past the physical SRAM. But since it is a precise fault, it should be easy enough to figure out once you get to the disassembly single stepping.
Alex
 

Online ataradov

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Re: STM32F401 hard fault at boot time
« Reply #4 on: Today at 08:23:42 pm »
Also, what is VECT_TAB_OFFSET? Different MCUs have different requirements on its alignment. ARM requires at least 128 bytes, but I've seen cases where 1K is required.

If your table is in the flash, try to not write VTOR at all.
Alex
 


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