ILI9341 LCD driver, max SPI clock speed?

[Chris C]

I'm using an ILI9341-based LCD module, and the 4-wire SPI interface to communicate with it.  According to the datasheet's spec for this interface, I should be able to write at up to 1s/100ns(twc)=10Mhz, and read at up to 1s/150ns(trc)=6.66Mhz.

However, I am successfully writing and reading at 24Mhz!  Not just for a simple test case, either.  I'm doing complex graphics, mixed reads/writes for alpha blends, both 16-bit and 24-bit pixel writes, and so on - yet haven't seen a single glitch.  (Except those caused when I bump my dodgy old breadboard or jumper wires.  That I'm using such poor connections, and it's still working at this speed when not physically disturbed, make this even more amazing.  The signal integrity must be horrible.)

In the past I've tried communicating with other complex SPI devices at speeds past their ratings, just to see what would happen.  All started showing issues with modest increases, even when run at max Vdd.  Yet I'm reading from this at 360% of its max rated speed!  And I know of cases of others doing the same with their ILI9341-based LCD, as well.

All of which really makes me question whether I've read the spec and converted from ns to Mhz properly.  Did I simply make a stupid mistake?  Here's the relevant page from the datasheet:

[madires]

I'm reading the ILI9341's datasheet right now (going to add support to the Transistortester) and I think your calculations are correct. A quick web search lists some blog postings claiming that a 24, 36 and even 48 MHz SPI clock runs fine.

[Chris C]

Hmm, odd.  I wonder why they underrated it so much.  Or if individual variation between ICs is incredibly large.

Or perhaps that rating applies only at the lowest core voltage.  In looking over the initial register setup provided with the module, I noticed what appears to be an option to change that voltage, and that it's being set one step short of max.

BTW, if you're talking about the same Transistortester that I think you are, that's an amazing project!  And one I will be benefiting from shortly, if my package ever shows up.   I'm familiar with most of the ILI9341, having written my own PIC-based driver for the ILI9341 for it.  Should you run into any difficulties, I may be able to help, and will certainly be willing to try.

[DavidMenting]

I was pleasantly surprised by this fact as well. I'm running 16 of them at the same time at a bit over 30 MHz in this art installation:

[Chris C]

That's a wonderful zoetrope!  Thanks for sharing it.

[bastelWastel]

I ended at SCLK=78.75 (315M/4) these days. Thanks for the Timing Chart posted above. For 2 weeks I was looking for this information despite I have the ILI datasheet! But seemingly I always stopped searching at the signal charts in chapter #7. 

[madires]

Welcome to the display overclockers!

[soFPG]

Which controller does 80MHz SPI? ESP8266?
8-Bit parallel would probably be easier in case you don't have an 80MHz SPI capable µC

[madires]

You should be able to find ARM based MCUs with a sufficient clock rate. I have no idea about the ESP8266 which runs at 80 or 160MHz. A quick search shows that the SPI clock is derived from the system bus which runs at 80MHz and the smallest divider is 1. So it should be able to do 80MHz SPI.

[Theboel]

I use ILI9341 with arduino nano my problem is the graphic look in slow motion/ slow update I really apreciate if someone can help me to solve this problem based from this "OC discussion"

[TK]

STM32 @ 180MHz can do 45MHz SPI.  The Teensy 4.0 runs an NXP cortex-m7 micro @ 600MHz, I have not tested SPI but I estimate it can go over 100MHz.

[TK]

The spec posted by OP says MIN 100ns, so it is minimum 10MHz.  Am I missing something?

[madires]

I use ILI9341 with arduino nano my problem is the graphic look in slow motion/ slow update I really apreciate if someone can help me to solve this problem based from this "OC discussion"

Max SPI clock rate for an ATmega328 running at 16MHz is clk/2 = 8MHz when using the hardware SPI. Bit-bang SPI is way to slow.

[madires]

The spec posted by OP says MIN 100ns, so it is minimum 10MHz.  Am I missing something?

Yep, that's what the datasheets states. But several people tried higher SPI clock rates and the ILI9341/9342 was still happy. So we wonder what the real maximum is.

[TK]

There is an interesting discussion on the Teensy forum about running ILI9341 @ 80MHz with a Teensy 4.0 board

https://forum.pjrc.com/threads/57652-Teensy-4-SPI-bus-gt-38mhz-possible

[ajb]

The spec posted by OP says MIN 100ns, so it is minimum 10MHz.  Am I missing something?

Time and frequency are inverse of each other, so minimum time determines maximum frequency and vice versa.  As frequency goes up, period goes down, so anything above 10MHz will have <100ns period, and therefore violates the minimum time specification.

I wonder if this means that the parallel interface can also be run faster than spec.  Being able to write 16bits @ >15MHz would be nice.

[TK]

The spec posted by OP says MIN 100ns, so it is minimum 10MHz.  Am I missing something?

Time and frequency are inverse of each other, so minimum time determines maximum frequency and vice versa.  As frequency goes up, period goes down, so anything above 10MHz will have <100ns period, and therefore violates the minimum time specification.

I wonder if this means that the parallel interface can also be run faster than spec.  Being able to write 16bits @ >15MHz would be nice.

You are totally right... I had my senior moment...   

[newbrain]

Just a single data point, but with a different controller: The HX8357-D, in a 3.5" Adafruit display.

I'm running it with the SPI (from an i.MX RT1021 evaluation board) at 45MHz: three times the maximum write clock frequency in the datasheet.
No glitches or crashes.

These controller chips seem to take a lot more than they are specified for.

[T3sl4co1l]

FYI, the ST7735 and RM68050 do seem to run out of poop, near their rated timings.

It's been a few years since I was actively developing with them so I don't remember exactly what or how much.  My platform only has powers of 2 SPI clock control (prescalers) so I wasn't able to push very close to ratings.

Tim

[MulattoKid]

@newbrain - I'm curious if you had to do anything special to get the SPI clock to run at 45MHz? If I go above the specified 15.15MHz (66ns as in the spec for DBI Type-C WRX_SLC) the output on the screen is corrupted. I'm driving it from an ESP32-S3, but not sure if that matters...

[ajb]

@newbrain - I'm curious if you had to do anything special to get the SPI clock to run at 45MHz? If I go above the specified 15.15MHz (66ns as in the spec for DBI Type-C WRX_SLC) the output on the screen is corrupted. I'm driving it from an ESP32-S3, but not sure if that matters...

How do you have this hooked up?  Can you share a photo of the setup or layout if it's on a PCB?

How fast you can run SPI depends on connections and wiring as well.  If you have flying leads on a breadboard or something you will start seeing signal integrity issues sooner than on a nicely laid out PCB, and those issues will eat into whatever margin you might have for exceeding the data rate spec.  Another complication is pin drive strength, I don't know if the ESP32 has a setting for that, but if it's set too high or too low you can also have issues.  Insufficient drive strength will round over edges, and excessive drive strength will cause ringing and reflections, especially with non-ideal layout/wiring.

[newbrain]

@newbrain - I'm curious if you had to do anything special to get the SPI clock to run at 45MHz? If I go above the specified 15.15MHz (66ns as in the spec for DBI Type-C WRX_SLC) the output on the screen is corrupted. I'm driving it from an ESP32-S3, but not sure if that matters...

How do you have this hooked up?  Can you share a photo of the setup or layout if it's on a PCB?

Signal integrity is overrated.  (joking, of course, but read below!)

I'm honestly too ashamed to post a picture - it's the perfect example of how not to do these things 
My setup is just a bunch of 20 cm Dupont wires from the Arduino like connector of an iMX RT1021 evaluation board to this display.
The display board has some mods (to use I2C on the touch screen controller instead of SPI), and I'm never reading back from the display (max SPI clock frequency is lower when reading for that controller, IIRC).

Apart from that, nothing special, so the worst possible setup you could imagine, also taking into account that the 1021 lpspi peripheral needed to be overclocked to get to 45 MHz.

A friend of mine has a slightly better setup (it's an SDR receiver project we share), he soldered some IDC cable.
I need to dismantle the thing to carry it with me when I go back and forth with Italy, so never bothered doing a better job.

I raised the SPI frequency until artefacts started appearing, then backed off a bit - that's it.

The SW is extremely stable (FreeRTOS+CMSIS DSP based), and we never observed any glitches on the display - it has been left running for days on end - the display is updated every 100 ms with a 426×128 FFT and waterfall (plus as needed for other fields).

Funny as it might seem, I'm instead having 100 kHz I2C signal integrity problems (adding the touch screen controller was the straw that broke the camel's back - Audio codec, RTC, Si5351, 24C16 EEPROM - all flying Duponts, too).

[DavidAlfa]

Yes, you usually can do that, I've ran 75MHz SPI without issues, but works only for for writing, reading you'll get garbage, you'll have to lower the speed.
You're playing with tolerances and limits, you might find 10mm longer traces no longer work.
Also you might be getting small errors, but not noticiable by human eyes.

[MulattoKid]

Thanks for the replies (I'm a bit late as I was away on vacation for a few weeks) 

I'm afraid I can't share pictures, but the ESP32-S3 is on an in-house development PCB, and I have 20cm breadboard jumper wires connected from it to the Adafruit PiTFT 3.5" Touch Screen (HX8357-D controller). I'm only writing to the display, and I'm using the ESP's libraries for setting up the SPI bus etc.

also taking into account that the 1021 lpspi peripheral needed to be overclocked to get to 45 MHz.

Sorry, what peripheral is this?

[newbrain]

also taking into account that the 1021 lpspi peripheral needed to be overclocked to get to 45 MHz.

Sorry, what peripheral is this?

It's just the name of the NXP iMX RT10xx series SPI peripherals, low power SPI - there is also a different one based on the FlexIO.
IIRC, lpspi maximum frequency is 33 MHz, so I'm out of specs on both MCU and display sides.

It started just for fun as an experiment, but since it's perfectly stable (as said, on two boards+display), I left it alone and enjoyed the increased speed.

Of course, not recommended in any non-hobby application.