It looks like the data is being shifted out the correct way (MSbit first) and the STP1612pw05 has 16 channels of 16 bit data to load so the outer loop is correct, assuming the OP wants to load the same value to all channels.
The main problem I can see is in the handling of the LE latch signal, the OP is toggling the LE pin once per bit, same as the clock. Looking at the
datasheet if all 16 channels are being written using the default configuration, then the LE pin needs to be raised for the last bit (LSbit) on the first 15 channels and for the last two bits on the 16th channel. This makes using an USART/SPI peripheral a bit tricky. It's not a very well written datasheet (ST, nothing new there) but it appears it can be configured to accept all 16 channels with a single latch operation by setting the MSbit in the config register. Also the default configuration only provides 12 bit PWM operation, so the 0x5555 value being written in by the OP would be truncated to 0x0555.
I don't know if the setup/hold delays are required, probably not since the datasheet shows single digit nanosecond values which will likely be provided by the bloatware HAL.
Something like this should work for the default configuration, though this is completely untested and likely full of typos.
void STP1612PW05_write_all_chans (uint16_t regdata );
uint16_t STP1612PW05_spi_rw (uint16_t byte_out, uint16_t LE_mask);
int main(void)
{
MX_GPIO_Init();
MX_TIM3_Init();
/* USER CODE BEGIN 2 */
HAL_TIM_Base_Init(&htim3);
HAL_TIM_PWM_Init(&htim3);
HAL_TIM_Base_Start(&htim3);
HAL_TIM_PWM_Start(&htim3, TIM_CHANNEL_1);
while (1)
{
STP1612PW05_write_all_chans(0x07FF); /* 12 bit PWM by default, need to set config register to get 16 bit */
}
}
// my software spi function
#define SPI_SCLK_LOW_TIME 200
#define SPI_SCLK_HIGH_TIME 1
#define SPI_MOSI_PORT GPIOB
#define SPI_MOSI_PIN GPIO_PIN_4
#define SPI_MISO_PORT GPIOC
#define SPI_MISO_PIN GPIO_PIN_8
#define SPI_SCLK_PORT GPIOB
#define SPI_SCLK_PIN GPIO_PIN_5
#define STP1612PW05_DATA_LATCH 0x0001
#define STP1612PW05_GLOBAL_LATCH 0x0002
#define STP1612PW05_LE_PORT GPIOB
#define STP1612PW05_LE_PIN GPIO_PIN_9
/**
* Write a single value to all 16 channels of the STP1612PW05.
* @param chandata 16 bit value to write to all channels.
*/
void STP1612PW05_write_all_chans (uint16_t chandata)
{
uint16_t le_set;
for(int i=0; i<16; i++)
{
/* When le_set == bit, the LE pin will be set high
Channels 0-14 the LE is high for the final clock cycle
Channel 15 the LE pin is high for the final two clock cycles */
le_set = (i < 15) ? STP1612PW05_DATA_LATCH : STP1612PW05_GLOBAL_LATCH;
STP1612PW05_spi_rw(chandata, le_set);
}
}
/**
* Read and write 16 bits of data to/from the STP1612PW05.
* @param data_out 16 bit data value to send.
* @param LE_mask Set data bit for LE rising edge (STP1612PW05_DATA_LATCH or STP1612PW05_GLOBAL_LATCH).
* @return 16 bit data value read from STP1612PW05.
*/
uint16_t STP1612PW05_spi_rw (uint16_t data_out, uint16_t LE_mask)
{
uint16_t data_in =0;
uint16_t bit;
for (bit = 0x8000; bit; bit >>= 1)
{
/* Set outgoing data bit to MOSI */
HAL_GPIO_WritePin(SPI_MOSI_PORT, SPI_MOSI_PIN, (data_out & bit) ? GPIO_PIN_SET : GPIO_PIN_RESET);
/* Delay for at least the peer's setup time */
for(int i=0;i<SPI_SCLK_LOW_TIME;i++)
{
}
/* Set LE pin high if required */
if( bit == LE_mask )
{
HAL_GPIO_WritePin(STP1612PW05_LE_PORT, STP1612PW05_LE_PIN, GPIO_PIN_SET);
}
/* SCLK high */
HAL_GPIO_WritePin(SPI_SCLK_PORT, SPI_SCLK_PIN, GPIO_PIN_SET);
/* Read incomming data bit from MISO */
if( HAL_GPIO_ReadPin(SPI_MISO_PORT, SPI_MISO_PIN) == GPIO_PIN_SET )
{
data_in |= bit;
}
/* Delay for at least the peer's hold time */
for(int i=0; i<SPI_SCLK_HIGH_TIME; i++)
{
}
/* SCLK low */
HAL_GPIO_WritePin(SPI_SCLK_PORT, SPI_SCLK_PIN, GPIO_PIN_RESET);
}
/* Set the LE pin low after D0 shifted out */
HAL_GPIO_WritePin(STP1612PW05_LE_PORT, STP1612PW05_LE_PIN, GPIO_PIN_RESET);
return byte_in;
}