Author Topic: Interfacing to the parallel bus output of an ADC (AD7771) with a microcontroller  (Read 3734 times)

0 Members and 1 Guest are viewing this topic.

Online dietert1

  • Super Contributor
  • ***
  • Posts: 2071
  • Country: br
    • CADT Homepage
That ADC requires some bandwidth. At full data rate it produces 24 MBit/sec, something that doesn't even stream over many built-in USB peripherals. And if you want a two second record, there will probably be external RAM and a pretty complex project to achieve the bandwidth to memory, from memory and to the host. The evaluation kit does not support streaming.
A 5$ solution for streaming may be a FT2232H in parallel FIFO mode. The FT2232H will do high speed USB up to 40 MByte/sec, more than enough. It has internal 4 KByte FIFO size.

Regards, Dieter
« Last Edit: June 06, 2023, 10:27:12 am by dietert1 »
 

Offline super7800Topic starter

  • Regular Contributor
  • *
  • Posts: 81
  • Country: us
so this was originally supposed to be a quick one-off (well, maybe a 10 off at most lol), but it looks like it may be a more advanced project. Cost of MCU is nonissue.

The idea is to store data onto an internal microSD card (over SPI), then when the test is done stream the data to the PC.

So I really don't want to involve the complexities of designing a proper high-performance single-chip solution (i.e. a FPGA with an ARM core). If performance is hurt by this so be it.

"bit-banging" the interface using interrupts doesn't seem to be a viable solution (at least I couldn't get it working reliably). I'm now starting to think that a two-chip solution may be the best bet, or just try moving to an STM32.

The SAMD51 has a QSPI interface which may be another option with ADC-as-master. SAMD51 is master only

@Miyuki would you be able to elaborate on how you connected/interfaced the STM32 to the AD777x? I have never used the STM32 or SAI peripherals before, but that does seem promising. There seems to be some example code for the STM32, but it doesn't use the SAI interface.

Attached is a diagram of the system as-is and as-proposed. Will give a better picture of what the design looks like.
« Last Edit: June 07, 2023, 03:06:04 pm by super7800 »
 

Online ataradov

  • Super Contributor
  • ***
  • Posts: 11253
  • Country: us
    • Personal site
You still have not mentioned your desired sampling frequencies, and this is the critical part that would define the design.

SAM D51 QSPI is a master-only.
Alex
 

Offline super7800Topic starter

  • Regular Contributor
  • *
  • Posts: 81
  • Country: us
@ataradov ideally I would get the full 128ks that the ADC is capable of. However, I can slow the DUT down and can live with a lower sample rate. This is very much non-ideal.
 

Offline langwadt

  • Super Contributor
  • ***
  • Posts: 4425
  • Country: dk
@ataradov ideally I would get the full 128ks that the ADC is capable of. However, I can slow the DUT down and can live with a lower sample rate. This is very much non-ideal.

how many SPIs can you spare and how many channels do you need?

I think you could do 4*64ksps with two slave SPI in parallel
 

Online ataradov

  • Super Contributor
  • ***
  • Posts: 11253
  • Country: us
    • Personal site
@ataradov ideally I would get the full 128ks that the ADC is capable of. However, I can slow the DUT down and can live with a lower sample rate. This is very much non-ideal.
This would require is 3 MB/second, even if you could receive the data.

The best approach with MCUs I see here is to just use multiple SPI interfaces in parallel . They don't need to have any special internal connections, they will just each handle their own line and share the clock. They would place the data into their own linear buffers, so some bit shuffling would be required, but it should not be too hard.

The hardest part here is to actually get the DRDY bit and start reception in time. I'm not even sure it is possible at that rate.

This output format is really not designed to be read by the general purpose MCUs.
Alex
 

Online dietert1

  • Super Contributor
  • ***
  • Posts: 2071
  • Country: br
    • CADT Homepage
Recently we got a WEACT STM32H750 module from digikey and it included an OV2640 camera. Until now i did not look into this, but i guess there is a DVI input peripheral that can be used to pass the ADC data into MCU RAM using DMA. The ADC output signal DRDY would be a fifth data bit so the firmware can later partition the data.
I just looked into the reference manual. They call it DCMI and it includes a HSYNC input that one can use for syncronization.

Regards, Dieter
« Last Edit: June 08, 2023, 05:54:21 am by dietert1 »
 

Online ataradov

  • Super Contributor
  • ***
  • Posts: 11253
  • Country: us
    • Personal site
Yes, MCU with a parallel capture interface may work. But you also need to check the specs, since some of them will not capture arbitrary data without correct HSYNC/VSYNC signals and may include blanking periods.

The most universal parallel capture interface I know of is present in Atmel SAM E70/V7x MCUs. It is just 8-bits, external clock and enable signals that may be permanently enabled. I easily captured 50 MHz stream using it.
Alex
 
The following users thanked this post: thm_w, Nominal Animal

Offline super7800Topic starter

  • Regular Contributor
  • *
  • Posts: 81
  • Country: us
@ataradov interesting peripheral. it does have a QSPI peripheral, so I should be able to take data from the ADC and stream it there (to an onboard QSPI chip) until the PC wants it. Or i could use its HSMCI peripheral. It is a bigger IC than what I had before. It will physically fit, but the board will have to be redesigned for 6 layers, which is no big deal. bought a demo board to play with. ATSAMV71XULT.

i will have to think more on using an FPGA. Im most familiar with Xilinx, but all their new ones are BGA, which is a pain to solder, but doable.

Xilinx was bought by AMD? when did this happen lol?

https://www.digikey.com/en/products/detail/microchip-technology/ATSAME70N19A-AN/5235879
« Last Edit: June 09, 2023, 09:43:16 pm by super7800 »
 

Online ataradov

  • Super Contributor
  • ***
  • Posts: 11253
  • Country: us
    • Personal site
it does have a QSPI peripheral, so I should be able to take data from the ADC
Writing to QSPI memory may be slow. If you replace it with QSPI SRAM, it may work, but still may be tight.

In my case I transferred the 50 MHz stream into the USB and let host PC deal with it.

But it also has quite a lot of internal SRAM too.

Alex
 

Offline super7800Topic starter

  • Regular Contributor
  • *
  • Posts: 81
  • Country: us
So i ended up moving to a 2 board solution. I'm (planning on) using a SAMD51 which has a SD host controller (SDHC) and a PCC interface (for the ADC).  I'm considerably more well-versed in the samd21 and 51 then the SAM E70/V7x, however if this doesn't give me the performance i need ill end up making the switch. The chip was also physically smaller. I've never used DMA or PCC, so this will be "interesting".

« Last Edit: June 29, 2023, 04:02:08 pm by super7800 »
 


Share me

Digg  Facebook  SlashDot  Delicious  Technorati  Twitter  Google  Yahoo
Smf