Electronics > Microcontrollers

Is it possible to synchronize the ADC and a multiplexer channel sweep on STM32 ?

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You can sample an unconnected or internal channel (eg: intvref) in the sequence first instead of throwing away good samples. I assume your muxes will switch within one adc conversion time.
Using timers to trigger ADC and DMA is trivial. You don't even have to sync them with hardware features, writing the registers within a protected code block is enough. (timer bus clocks are slow!)

Considering 8-bits noise-free performance of the adc ST uCPUs, makes sense to consider external adc with switching input matrix,
like ad7124/ad7193 + 4x 4052 to multiplex 8 uo to 32. ADC has GPIO that drives MUX, controled over SPI

Thanks a lot for the help.
And yeah good point on sampling intvref during mux switching. To be honest I was thinking of sampling a different ADC pin but was trying to keep the question isolated. But, monitoring the intvref stability may have its merits.
Also I'm not too worried about bit depth in this application, 6 bits is decent, 7 is good. So if the STM32H7B0xB is supposed to do 16 bits at 3MHz, things should work out even if it doesn't quite hold up to what the datasheet claims in practice. And an AD7124 single handedly doubles the BOM cost ! But I can see that being useful in other use cases yeah, thanks for the suggestion.

With the suggested phase setup there is no need to sample another channel with the ADC. Only complicates the setup more.

At compare moment 1 sample the input with the ADC and on compare moment 2 switch the multiplexer. By lowering the timer frequency you can adjust it to match the multiplexer settling time.

I looked at the reference manual and noticed it uses the DMAMUX system, which allows for more possibilities, but makes it a bit more complex to setup.

More details necessary to give reasonable advise. Sampling rate, output impedance of the sensors, dynamic range, distance between boards. Settling time of the MUX may be much higher than expected, and SAR adc requires buffer or caps on inputs, though H7 likely have OPA on board that may simplify interfacing


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