Yes, Ambiq has been doing this for over 10 years. https://ambiq.com/soc
I believe that what Ambiq implements is covered by a number of patents, so it'll be interesting to see how ST did it, how it is different.
The datasheet for their Apollo4 claims "5 µA/MHz active mode current" and "up to 250Mhz". Wow, that would only be 1.25mA. Suspiciously good, I've never heard of these things, maybe I'm misunderstanding and the power draw isn't as good as this in practice?
This is the lowest achievable figure, of course, as with all such figures announced in datasheets. But it is true - it's the active mode current of the CPU core only (no peripheral enabled, no DMA, ...) plus exec. from RAM (I think?), and probably with not all RAM banks enabled. Also, at least that was the case for the Apollo 3 and older, the lowest power consumption per MHz can be achieved only up to a certain frequency, beyond which you need to enable a "turbo" mode (probably increasing the gate voltage a bit) which draws a bit more, but still with an impressive figure. For instance, the Apollo 3 has its lowest power consumption mode up to 48 MHz, beyond which you need to enable this turbo mode (up to 96 MHz). I have a dev board of these, so I can confirm it does match the datasheet figures. Of course, in practice, with a few peripherals enabled and such, you'll get a much higher figure, but still pretty impressive
We had discussed using these chips in commercial products with a forum user, the name of which I don't remember - he seemed to say that Ambiq was not great to deal with. I haven't had any direct contact with them personally, so I can't tell.
Relatively excited to see this in a ST product, but we'll see what the specs are...