hello,
It’s not always easy to speak French to English. I use a translator.
I repeat the following post to understood.
https://www.eevblog.com/forum/testgear/backup-firmware-dg1022/Look at the hand-made diagram, we see the Altera and not the lattice.
Yeah, it’s a little confusing talking about Lattice and Altera.
If we follow all the posts on this subject, we always talk about chaining JTAG the lattice and the blackfin.
The goal is to reprogram a firmware, it’s complex.
This firmware can be installed in part in the S29GL032, and part in the lattice. I understood it like that with all posts on this subject.
You have to read the posts about it, there are hundreds of pages.
This is a subject that dates back 10 years, we must get back in.
For now, the main point is to operate the Lattice alone in JTAG. It's must work, but not on my board.
And there, no result for the moment.
Perhaps someone could measure the impedance on the Lattice’s JTAG port. I find strange results (Open, or 0.7Mohm), but TCK only some KOhm.
See the picture of connxion
So I’m digging this trail.
cdt