I have used Xilinx CoolRunner II CPLDs. Mostly because i am more familiar with the Xilinx ISE design suite than Altera's Quartus.
But also because the CoolRunner is a quite nice chip series with several macrocell sizes and multiple I/O banks allowing different logic voltage levels.
Note that the project you linked in the original post, the device is an older XC9500 series CPLD. Those have only 36 macrocells (at least the ones you can actually get from DK), while CoolRunners go up to 512 macrocells if necessary. Maybe not important but worth mentioning, perhaps.