I am looking for an MCU which can internally route IO input pins to IO output pins.
I have a device with a processor connected to SPI flash and I want to make a board with a MCU that ‘hooks onto’ the SPI lines, act as sniffer and is able to disconnect the SPI flash from the device’s processor and inject data to both the processor as the SPI flash.
Basically, it ‘sits’ between the device processor and SPI flash, can sniff and inject data both ways.
That sounds like a nightmare in latency issues.
Is this for volume production, or for a development lab ?
If you want a subset of what you describe, eg a Test/pgm MCU that can program/verify flash, and load small test programs to the host, that might be possible with some software rules on the host.
To PGM flash, you hold the host in reset and can simply tap into the lines.
To mimic flash, you can disable chip select, but the small MCU may struggle to keep up with the host loader speed, and it may not manage random-read flash.
Boot replace is simpler, if the host always reads from a fixed FLASH address, you can ignore the address value and spend that time getting ready to send data.
Good FIFOs will help here, and ideally you want a SPI that can preload TX FIFO and wait for SS =\_ so it has more chance of emulating flash read.
Addit:
The EFM8BB52 has good SPI-CLU connection options, that may manage the test flows I gave above, tho it may be a bit small for you ? It certainly is cheap.