Author Topic: Memory model for Microcontrollers  (Read 7510 times)

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Offline Kittu20Topic starter

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Memory model for Microcontrollers
« on: April 30, 2024, 05:58:01 pm »
Hi there,

I came across this link https://www.geeksforgeeks.org/memory-layout-of-c-program/amp/ explaining the C memory layout and how variables are stored in memory sections. The example used here involves a PC.

I'm curious to know if this memory model is also applicable to microcontrollers like 8051, PIC, AVR, and ARM. Have you used this c memory model for these microcontrollers?
 

Online mariush

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Re: Memory model for Microcontrollers
« Reply #1 on: April 30, 2024, 06:02:54 pm »
Aren't you the same person that asked this here ? https://www.avrfreaks.net/s/topic/a5C3l000000BqGsEAK/t391526

 
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Offline tggzzz

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Re: Memory model for Microcontrollers
« Reply #2 on: April 30, 2024, 06:07:50 pm »
Have a look at the OP's record, w.r.t. the number of topics started and the number of times they responded in their thread, the question's depth and the use of search engines.

Form your own opinion.
There are lies, damned lies, statistics - and ADC/DAC specs.
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Offline Kittu20Topic starter

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Re: Memory model for Microcontrollers
« Reply #3 on: April 30, 2024, 06:28:00 pm »
Aren't you the same person that asked this here ?
Yes, that was me. However, my question wasn't fully resolved or clarified, so I was hoping to gain more insight or a different perspective this time
 

Offline Kittu20Topic starter

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Re: Memory model for Microcontrollers
« Reply #4 on: April 30, 2024, 06:34:21 pm »
Have a look at the OP's record, w.r.t. the number of topics started and the number of times they responded in their thread, the question's depth and the use of search engines.

Form your own opinion.

I understand that this topic might be easier for you to grasp, but I'm finding it quite challenging. That's why I've approached my question a bit differently this time, hoping to gain more clarity.
 

Online pcprogrammer

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Re: Memory model for Microcontrollers
« Reply #5 on: April 30, 2024, 06:51:09 pm »
Think about this, "how much random access memory is there available on my microcontroller" and then think about wasting it with lists that keep track of the usage of this memory.

When you only have 2K of RAM you don't waste it with the usage of malloc, you just declare variables or buffers for your tasks and forget about heaps as much as you can.

Online PlainName

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Re: Memory model for Microcontrollers
« Reply #6 on: April 30, 2024, 09:30:24 pm »
Quote
When you only have 2K of RAM you don't waste it with the usage of malloc

Dynamically allocating storage can allow you to store more things than you have space for had you used static allocation. You just can't store them all at the same time, but that may be perfectly OK in the application. For a small micro you would probably have a combination, with dynamic memory being allocated from a block of statically allocated memory.

Er... and malloc isn't the be-all and end-all of dynamic memory. Indeed, if you think that's how it has to be done then you could well be missing some really useful techniques.
« Last Edit: April 30, 2024, 09:31:59 pm by PlainName »
 

Online tellurium

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Re: Memory model for Microcontrollers
« Reply #7 on: April 30, 2024, 11:42:14 pm »
NOTE: This message has been deleted by the forum moderator Simon for being against the forum rules and/or at the discretion of the moderator as being in the best interests of the forum community and the nature of the thread.
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« Last Edit: May 01, 2024, 05:49:10 pm by Simon »
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Offline Kittu20Topic starter

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Re: Memory model for Microcontrollers
« Reply #8 on: April 30, 2024, 11:55:18 pm »
I think that the C memory layout sections like .text, .data, .bss, .heap, .stack depend on the type of microcontroller and compiler. We cannot view these memory sections for 8051 and PIC microcontrollers because they do not support them, whereas we can view these sections using STM32CubeMX and STM family
 

Offline Kittu20Topic starter

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Re: Memory model for Microcontrollers
« Reply #9 on: May 01, 2024, 12:01:45 am »
I think this AI bot should just be banned
I apologize if I'm struggling to grasp the concept. I am trying my best I genuinely want to learn and appreciate any guidance or explanations provided. Please feel free to share your insights or suggestions on how I can improve my understanding. Thank you for your patience
 

Online langwadt

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Re: Memory model for Microcontrollers
« Reply #10 on: May 01, 2024, 12:22:41 am »
I think this AI bot should just be banned
I apologize if I'm struggling to grasp the concept. I am trying my best I genuinely want to learn and appreciate any guidance or explanations provided. Please feel free to share your insights or suggestions on how I can improve my understanding. Thank you for your patience

yes it is similar, that's how C  works, though for an MCU with flash it is more like this.

https://shatteredsilicon.co.uk/wp-content/uploads/sites/7/2021/01/Embedded-Memory-1.png
 
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Offline radiolistener

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Re: Memory model for Microcontrollers
« Reply #11 on: May 01, 2024, 01:04:12 am »
I'm curious to know if this memory model is also applicable to microcontrollers like 8051, PIC, AVR, and ARM. Have you used this c memory model for these microcontrollers?

Different MCU has different memory layout. They may have different architecture, for example some of them may have separate address space for program and for data and other have the same address space for both.
 
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Online Nominal Animal

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Re: Memory model for Microcontrollers
« Reply #12 on: May 01, 2024, 02:47:57 am »
Kittu20, are you familiar with the term address space?  Simply put, it means that a given address, say address 24, can refer to completely different things, if there is more than one address space.

Let's do a deep dive into the subject.  (For those annoyed at my wall of text posts, I apologize; in my defense, I do believe the below information is useful or perhaps even necessary for learners interested in embedded/microcontroller development.)

On x86 and x86-64 (= AMD64), there are two address spaces: memory and I/O.  I/O addresses use different machine instructions (IN and OUT) compared to normal memory accesses.  32- and 64-bit x86 and x86-64 also support virtual memory, where a privileged kernel can control what addresses unprivileged code can access, and map different physical memory addresses to the address space the unprivileged code can see.  Because of security reasons, current fully-featured 32-bit and 64-bit operating systems use address space layout randomization, where the actual address ranges used by some code are varied at run time.  The binaries they run contain relocation records, so the run-time linker can "fix" the code and data to refer to the correct randomized addresses.

Aforementioned x86 and x86-64 are based on the von Neumann architecture, where code and data uses the same address spaces.  Older AVRs for example use Harvard architecture, where code and data use separate address spaces (and even separate machine instructions, LPM/ELPM/SPM for program memory, LD/ST et al for data memory).

Clang supports multiple address spaces for both C and C++, but GCC currently only for C.  This is why the Arduino environment is so "messy": it uses its own preprocessor, but g++ (GNU GCC C++ compiler) for compiling, which only supports von Neumann architectures; but to work for Harvard architectures, the Arduino developers had to cut some corners.  For example, strings in RAM and strings in Flash use different functions (_P suffix in function name).  (In my opinion, because of this, C is more powerful language for older AVRs than C++ is, unless you limit yourself to Clang.  When the compiler can understand pointer and variable address spaces, you can use much less RAM and Flash, and leave the compiler to optimize the low-level accesses as best it can.  I like that.)

ARM Cortex-M microcontrollers use a single address space for everything.  Different types of memory and even peripheral devices are accessible at different addresses.  It is a memory-mapped architecture; one subtype of von Neumann architectures.

Most embedded development toolchains nowadays use ELF format object files.  Every code and data object (or "thing" in general) in ELF object files always belong to a specific section.  By default, .text section corresponds to code, .data to initialized variables, .bss to uninitialized variables, and so on; but this is just a convention, not a requirement.  When compilers generate code or allocate global variables, they do not assign them a fixed address, but an address relative to the relevant section.  The compilers even allow you to specify the section name yourself, if you want.  If you want to refer to a fixed address in your C or C++ code, you normally do so via a pointer: you declare a pointer to the code or data at that fixed address, and set the pointer value to that address.

When the different ELF object files are linked to form an executable or an embedded system firmware image, it is the linker –– often executed automagically by the compiler –– that decides the addresses at which different sections will occupy.  The way it does this is controlled by a linker script.  Fortunately, at least GNU/GCC/binutils (ld and gold) and Clang (LLVM LLD) linker scripts use the exact same format, documented here.

In practice, this means that if you declare structure variables describing a memory-mapped peripheral, you can assign it a specific section, say hw_name, and in the linker script, assign it the correct start address.  If you have device variants where the addresses vary but the structures stay identical, you can just create a different linker script for each variant.
As an example, consider Teensy 3.x, programmed in the Arduino environment, using the Teensyduino add-on.  The core support files are here, including the linker scripts for mkl26z64 (Teensy LC), mk20dx128 (Teensy 3.0 and 3.1), mk20dx256 (Teensy 3.2), mk64fx512 (Teensy 3.5), and mk66fx1m0 (Teensy 3.6).  There are some #if defined(__MKxxxx__) .. #endif snippets in the C/C++ code accounting for differences in e.g. peripherals, but the same codebase supports all these different Cortex-M0 (LC), Cortex-M4 (3.0, 3.1, 3.2), and Cortex-M4F (3.5, 3.6) microcontrollers.

(sdcc AKA Small Device C Compiler, used for e.g. Intel MCS51 (8051 et al), HC08, Z80, MOS 6502, Padauk pdk14 and pdk15, et cetera, doesn't really use ELF format object files; its linkers take command-line arguments specifying the details that provide roughly similar but very limited functionality compared to "bigger compilers'" linker scripts.)

In summary, this means that there is no fixed order or mapping for the different sections, at all.  Sometimes the processor/microcontroller, bootloader, and/or the board requires specific addresses for specific things, like peripherals at specific address range, RAM at another, Flash at yet another, maybe PSRAM in yet another, and so on, but the rest –– especially RAM use for initialized and uninitialized data, heap, and stack –– is up to the linker script (or equivalent configuration when using e.g. sdcc that has no explicit linker script).

Footnote:

GCC and Clang compiler options --ffunction-sections --fdata-sections -Wl,--gc-sections utilize ELF section and relocation information to drop completely unneeded code and data from the final linked object.  It does this by using a separate code/data/bss sub-section for every function, variable, and object.  Because ELF relocation records are section-specific, simply checking whether there are any relocation records targeting a section, the linker can tell whether the function/variable/object is used or not.

I use ELF section support extensively, both in embedded development, and when writing POSIX/GNU C for Linux/MacOS/BSDs.  The most useful case is declaring structures in separate source files, and have the linker collect them into a single contiguous array.  If you use Linux, you might want to examine my RPN calculator example: in this one, you can create new mathematical operators and declare them in a new C source file, compile it, and link it to the final binary, and the operator will be automagically available.
The one downside to this is that the order of the elements in the final array is unspecified: you cannot rely on the array elements being in any specific order.
I've written a few tools to deal with this –– I'd love to have e.g. an external Python script to be able to sort or reorder the entries, without changing their contents (Python because GDB also supports helper "commands" written in Python); or to add a perfect hash table for the entries (say, for command lookup) –– but I'm still investigating how to make that robust enough for my paranoid tastes.
« Last Edit: May 01, 2024, 02:49:52 am by Nominal Animal »
 
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Online pcprogrammer

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Re: Memory model for Microcontrollers
« Reply #13 on: May 01, 2024, 06:29:38 am »
Quote
When you only have 2K of RAM you don't waste it with the usage of malloc

Dynamically allocating storage can allow you to store more things than you have space for had you used static allocation. You just can't store them all at the same time, but that may be perfectly OK in the application. For a small micro you would probably have a combination, with dynamic memory being allocated from a block of statically allocated memory.

Er... and malloc isn't the be-all and end-all of dynamic memory. Indeed, if you think that's how it has to be done then you could well be missing some really useful techniques.

It very much depends on your application of course, but for the things I do I yet have to run into an application that needs to share the available memory between different tasks. In fact I try to stay clear of standard libraries as much as possible and do everything with basic C.

When the need arises to use some of the same memory for different tasks I won't be using malloc either.  >:D

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Re: Memory model for Microcontrollers
« Reply #14 on: May 01, 2024, 07:56:45 am »
Quote
When you only have 2K of RAM you don't waste it with the usage of malloc

Dynamically allocating storage can allow you to store more things than you have space for had you used static allocation. You just can't store them all at the same time, but that may be perfectly OK in the application. For a small micro you would probably have a combination, with dynamic memory being allocated from a block of statically allocated memory.

Er... and malloc isn't the be-all and end-all of dynamic memory. Indeed, if you think that's how it has to be done then you could well be missing some really useful techniques.

 but for the things I do I yet have to run into an application that needs to share the available memory between different tasks.

then how do you manage to run any C at all without a stack?
 

Online pcprogrammer

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Re: Memory model for Microcontrollers
« Reply #15 on: May 01, 2024, 08:05:15 am »
then how do you manage to run any C at all without a stack?

Stack is part of basic C, so that is used and taken into account.

Same as when programming in assembler, there is a reserved amount of memory for the stack.

Offline SiliconWizard

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Re: Memory model for Microcontrollers
« Reply #16 on: May 01, 2024, 08:05:33 am »
Quote
When you only have 2K of RAM you don't waste it with the usage of malloc

Dynamically allocating storage can allow you to store more things than you have space for had you used static allocation. You just can't store them all at the same time, but that may be perfectly OK in the application. For a small micro you would probably have a combination, with dynamic memory being allocated from a block of statically allocated memory.

Er... and malloc isn't the be-all and end-all of dynamic memory. Indeed, if you think that's how it has to be done then you could well be missing some really useful techniques.

 but for the things I do I yet have to run into an application that needs to share the available memory between different tasks.

then how do you manage to run any C at all without a stack?

Obviously the concept of "sharing memory" and even "dynamic allocation" is a bit elastic for many. Yes, many do not even realize that the basic stack, that you can't really do without in C that I know of (or that would be a bastardized variant of C), is both "shared memory" (unless you have separate stacks for separate tasks, but that would require some "manual" handling) and "dynamic allocation".
 

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Re: Memory model for Microcontrollers
« Reply #17 on: May 01, 2024, 08:19:41 am »
Obviously the concept of "sharing memory" and even "dynamic allocation" is a bit elastic for many. Yes, many do not even realize that the basic stack, that you can't really do without in C that I know of (or that would be a bastardized variant of C), is both "shared memory" (unless you have separate stacks for separate tasks, but that would require some "manual" handling) and "dynamic allocation".

Stack is basically part of the processor and you need it to be able to return from subroutines. There are processors that have multiple hardware stacks for user, system and or interrupt tasks. Then there are also software stacks that can be used of course. It all depends on programming languages, compilers and interpreters.

Declaring a lot of local variables in a function might be cause for stack overflow when the compiler uses the hardware stack for these, depending on how much stack space you reserve, so it is always good practice to think about where what data goes. That is why I have always liked old fashioned assembler, the total inside in how memory is used, as long as you write all the code yourself of course. A "modern" instruction set like for ARM is less fun because of the complexity of it. So many possibilities.  8)

Online Nominal Animal

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Re: Memory model for Microcontrollers
« Reply #18 on: May 01, 2024, 10:29:52 am »
Many linker scripts I've seen use a single consecutive RAM area for heap and stack, with heap growing upwards and stack downwards.  This way, the application code gets the best use of the leftover RAM, regardless of whether it uses deep stack (recursion) or malloc()-style dynamic allocation.  The risk, of course, is that the two collide.



One of my favourite AVR microcontrollers is the ATmega32U4, because of its native USB 2.0 (High Speed, 12 Mbit/s, and Low Speed, 1 Mbit/s) interface and instruction set well suited for C compilers.  It has only 2.5k of SRAM, 32k of Flash, and 1k of EEPROM, and 832 bytes dedicated for USB endpoint, so it is definitely limited by today's standards; but pretty darn nice for keyboards and other USB Human Interface Devices and USB-to-Serial/SPI/I2C stuff, when using freestanding C (i.e., without standard C library) on bare metal.  Fortunately, it has 32 general-purpose 8-bit registers (six of which are used as three 16-bit pointer registers), so most local variables in functions stay in registers, not using any RAM.

As it is Harvard architecture, Flash (program) and RAM (data) use separate address spaces.  It also has a somewhat separate I/O address space, and a yet another address space for EEPROM.

Using initialized global variables (data section) costs both RAM and Flash, because their values need to be copied from Flash or EEPROM to RAM during bootup.  However, it is cheap to clear the RAM.  GCC and Clang support putting zero-initialized variables into bss section (-fzero-initialized-in-bss option, enabled by default).  Thus, programmers targeting small microcontrollers benefit from designing their global variables to be initialized to all zeros.  On ATmega32u4, there is "lots" of Flash compared to RAM, so this is not really an issue, but is still useful to know for bare-metal programmers.

With 2.5k of RAM, you don't usually use heap at all via malloc()-style functions.  Sometimes, a stack-like heap can be useful, with either "push" and "pop" style functions, or with allocation moving the heap boundary and release/free reverting the heap to a previous state (so that any intervening allocations are also released/freed).  This way there is no bookkeeping needed to track allocations, and the overhead is minimal.  This also behaves nicely when the stack grows downwards. There also isn't any "heap" section per se, because such a "heap" occupies the same contiguous otherwise unused RAM as the stack is in, and basically relies on the stack not growing large enough to overlap with the "heap".

If we consider the original question for ATmega32u4, text will be in Flash (program memory) in its own address space, and stack + heap + data in its own address space.  Stack and heap often occupy the same address range (often at the upper end of the RAM address range), with stack growing downwards and any heap allocations upwards.  Depending on the developer, there may not even be an initialized data section, only a zero-initialized "bss"-type section –– and that can be surprising, with global variables initialized in ones C code having unexpected random or zero values on the microcontroller ––; but supporting both (non-zero)-initialized and uninitialized/zero-initialized data costs only the additional Flash space for the bootloader function and Flash/EEPROM space to hold the initial values.

The take-away is that a developer using GCC/Clang toolchain for ATmega32u4 AVR microcontroller has quite fine-grained control of the memory layout (at the bootloader and linker level), and can tune the details to best suit their needs.
 

Offline brucehoult

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Re: Memory model for Microcontrollers
« Reply #19 on: May 01, 2024, 10:31:15 am »
It very much depends on your application of course, but for the things I do I yet have to run into an application that needs to share the available memory between different tasks.

I don't know what you're doing but it is EXTREMELY common for applications, including deeply embedded ones, to operate in two phases 1) initialization, 2) a loop processing events. It is very common for initialization to need to use a good amount of memory temporarily, which can then be freed before running the main loop, which can use that memory for other things.  Some of that might be on the stack, but not all.

Even when it can be on the stack, you need to structure your code carefully into functions so that init memory actually IS freed e.g. don't do init in the main program, but call a function for it.
 

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Re: Memory model for Microcontrollers
« Reply #20 on: May 01, 2024, 11:17:27 am »
It very much depends on your application of course, but for the things I do I yet have to run into an application that needs to share the available memory between different tasks.

I don't know what you're doing but it is EXTREMELY common for applications, including deeply embedded ones, to operate in two phases 1) initialization, 2) a loop processing events. It is very common for initialization to need to use a good amount of memory temporarily, which can then be freed before running the main loop, which can use that memory for other things.  Some of that might be on the stack, but not all.

Even when it can be on the stack, you need to structure your code carefully into functions so that init memory actually IS freed e.g. don't do init in the main program, but call a function for it.

I guess I should have added "for embedded coding", but since this thread is about microcontrollers it is basically implied.

The things I do with microcontrollers are mostly, small MCU based, simple control devices, like the FT remote control I wrote about, and the initialization done for this kind of things is trivial and mainly configuring of peripheral registers, so no or not a lot of additional memory needed. For the more demanding stuff I might use the standard libraries and even dynamic memory allocation, but only if there is plenty of memory available.

On a big computer it is a different story. There is an OS to work with and memory management that makes things a whole other ballgame.


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Re: Memory model for Microcontrollers
« Reply #21 on: May 01, 2024, 11:18:29 am »
I apologize if I'm struggling to grasp the concept. I am trying my best I genuinely want to learn and appreciate any guidance or explanations provided. Please feel free to share your insights or suggestions on how I can improve my understanding. Thank you for your patience

You do not struggle with anything, cause you're a bot.

A person that wants to learn, shows a totally different pattern. Asks specific questions, follows up on explanations.
The topics that you start are way too broad. So different all the time. Questions are never specific. And you never seem to learn anything, years after you asked.

It's a shame to see people reply. Well, maybe there is a merit to it, as other engineers may learn reading those threads.
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Offline brucehoult

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Re: Memory model for Microcontrollers
« Reply #22 on: May 01, 2024, 11:23:41 am »
It very much depends on your application of course, but for the things I do I yet have to run into an application that needs to share the available memory between different tasks.

I don't know what you're doing but it is EXTREMELY common for applications, including deeply embedded ones, to operate in two phases 1) initialization, 2) a loop processing events. It is very common for initialization to need to use a good amount of memory temporarily, which can then be freed before running the main loop, which can use that memory for other things.  Some of that might be on the stack, but not all.

Even when it can be on the stack, you need to structure your code carefully into functions so that init memory actually IS freed e.g. don't do init in the main program, but call a function for it.

I guess I should have added "for embedded coding", but since this thread is about microcontrollers it is basically implied.

My reply was about embedded programming.

Quote
The things I do with microcontrollers are mostly, small MCU based, simple control devices, like the FT remote control I wrote about, and the initialization done for this kind of things is trivial and mainly configuring of peripheral registers, so no or not a lot of additional memory needed.

If any additional memory is required at all then reclaiming and reusing that memory can allow you to run on a smaller and cheaper chip. For example one with 512 bytes of RAM instead of 2k. Or maybe even one with 32 bytes of RAM/registers.
 

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Re: Memory model for Microcontrollers
« Reply #23 on: May 01, 2024, 11:40:24 am »
If any additional memory is required at all then reclaiming and reusing that memory can allow you to run on a smaller and cheaper chip. For example one with 512 bytes of RAM instead of 2k. Or maybe even one with 32 bytes of RAM/registers.

If needed sure, but these days devices with a nice amount of memory are cheap, and especially when you are a hobbyist it is not of much importance.

I have never worked in a market where there was a need for a lot of cost saving, which might be called a luxury, and when the more sophisticated MCU's came around I was solely active in system management and web based software development. Only after I early retired I got back in the game of microcontrollers to discover this whole new world of very nice and fast gadgets to play with.

Wonderful times coding in C where I used to do everything in 6502, Z80 or 8051 assembler. The portability of C for a lot of functionality is lovely. Fat change with assembler without a lot of work when changing the underlying processor.

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Re: Memory model for Microcontrollers
« Reply #24 on: May 01, 2024, 11:59:28 am »
It very much depends on your application of course, but for the things I do I yet have to run into an application that needs to share the available memory between different tasks.

I don't know what you're doing but it is EXTREMELY common for applications, including deeply embedded ones, to operate in two phases 1) initialization, 2) a loop processing events. It is very common for initialization to need to use a good amount of memory temporarily, which can then be freed before running the main loop, which can use that memory for other things.  Some of that might be on the stack, but not all.

Really ?  What sort of initialisation would need a significant amount of RAM temporarily ?
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