As langwadt said though, unless the OP has strict timing requirements regarding memory access (in the sense of some jitter would be unacceptable, which I doubt here), that we can assume would not be required to be done at a higher frequency than 1MHz, it could be all bit-banged with pretty much any 32-bit MCU running at a few tens of MHz. So if RISC-V is required, pick one of the avaiaible ones such as what chickenHeadKnob suggested.
The only additional thing to know is, would this external memory access have to be "transparent" to the MCU core itself? (Meaning, transparently with just load/store instructions?)
If so, that might still be doable with bit-banging, implementing an exception set to trigger upon memory access to the address space you would define for this external memory.
Even with an exception in between, at 144MHz you should be able to work it out, although you'd have to look at the worst-case latency for exception handling on the particular MCU you're gonna use. And probably you'll need one with PMP too (to set up the exception).