So... I want my firmware to be able to tweak my crystal frequency.... perhaps twiddling a spare IO line which applies a gentle load to a leg of the crystal to speed it up or slow it down, or some such? Anyone have any ideas?
I can't do the tweaking in the digital domain, as I have an ADC sampling using the STM's clock, and at the end of the 10 seconds I'd either have too many or too few ADC samples.
How many ppm do you need to lock to ?
Or is an average good enough, and you need to get some sample count match per day ?
Such Analog-domain corrections are done in some RTCs, there they switch a cap in/out on a rate-multiplier at say 1ms cadence, and a 256 repeat gives 8 bits of trim.
PWM can also be used, but rate multiplier has higher modulation so better averages.
The Xin pin usually has a higher ppm/pF pull than the Xout pin.
You could try a IO pin between Analog-in (floats), and CMOS gnded, or use a small FET / analog switch.
If the MCU has a DAC. you could experiment with a varicap diode thus making a VCO.
Or, if drift matters you may like to drop the Xtal and use a VCTCXO as those will 'hold lock' much better than a xtal.
The GPS ones are quite cheap. (19.2MHz, 26MHz, 38.4MHz)