No ethernet PHY connectivity with ESP-32-WROOM

[padagra]

Finally back home from work.

Here's my findings:
- The ethon trigger looks good. Yellow trace is PHY_POWER and blue trace is 3.3VLAN
- The ethoff trigger does not turn off 3.3VLAN. Which makes sense because R9 being gone leaves the gate of Q5 floating so 3.3VLAN never can turn off

ETHON



ETHOFF



Edit 1:
The tests above are not using POE.

If I go from reboot > ethoff > ethon it will not connect. In fact the link/act lights don't even come on. But if I just do a reboot it will connect immediately without R9.

Code: [Select]

17:27:44.934 -> rebootets Jun  8 2016 00:22:57
17:27:44.934 ->
17:27:44.934 -> rst:0xc (SW_CPU_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
17:27:44.934 -> configsip: 0, SPIWP:0xee
17:27:44.934 -> clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
17:27:44.934 -> mode:DIO, clock div:1
17:27:44.934 -> load:0x3fff0018,len:4
17:27:44.934 -> load:0x3fff001c,len:1044
17:27:44.934 -> load:0x40078000,len:8896
17:27:44.934 -> load:0x40080400,len:5816
17:27:44.934 -> entry 0x400806ac
17:27:45.557 ->
17:27:45.557 -> Oct 25 2019 17:00:44
17:27:45.557 -> IDF-VERSION: v3.2.3-14-gd3e562907
17:27:45.557 -> ESP.     getSketchSize(): 653136
17:27:45.557 -> ESP.getFreeSketchSpace(): 1310720
17:27:45.557 -> STA MAC Address: 24 0a c4 23 fc 24
17:27:45.557 ->  AP MAC Address: 24 0a c4 23 fc 25
17:27:45.557 ->  BT MAC Address: 24 0a c4 23 fc 26
17:27:45.557 -> ETH MAC Address: 24 0a c4 23 fc 27
17:27:45.557 ->
17:27:45.557 -> Hi! We're in the loop()
17:27:46.098 ->
17:27:46.098 -> [Event #1] 21: ETH started
17:27:50.094 -> [Event #2] 23: ETH connected
17:27:50.094 -> [Event #3] 25: ETH Obtained IP address
17:27:50.094 -> ETH MAC:24:0A:C4:23:FC:27 IP:192.168.1.86 100Mbps/FD
17:28:16.276 -> ethoff ok
17:28:21.797 -> ethon ok


[padagra]

Small update, I breadboarded everything and ended up destroying my esp32 development board... I have more coming tomorrow.
Upon further inspection I don't think my traces are underrated on current capacity with R9. Their current trace width equates to .65a and I shouldn't be near that under normal operation.

I'm at a point now where once I breadboard this, I am wondering if I should just duplicate the schematic the 8720 LAN development board and put it in my circuit. All of this should be working but it isn't so I feel like to save everyone's time maybe I should just redo for a breadboarded circuit I know works?

I will update tomorrow.

[padagra]

Things are not going well over here. The SiLabs VCP drivers I need for these ESP32 dev boards has just outright failed on my Macbook. Reinstalling isn't changing my ability to see any ports. So I moved over to an old Windows 10 laptop where I can program them again.

Breadboarding my exact PCB with the transistors for PHY_POWER and the dev board is not working at all. I desoldered the 50mhz crystal from this 8720 dev board and fed in GPIO 17 through a 30ohm resistor directly into the board. Running your code (https://gist.github.com/xk/0c08f8a2c49b35a5e0a38aad2dc6f0ee), I am getting a timeout waiting for the PHY registers.

Additionally the 3.3VLAN on this breadboarded design, is very noisy. There is a lot of ripple and it's hard to tell if the timing is correct.



Did you feed a clock signal from the ESP32 directly into the 8720 dev board? Or did you use the ESP to power up the 50mhz crystal instead?

[GeorgeOfTheJungle]

Hi padagra,

I don't think this can work like that. There are quite tight timing constraints in the RMII signals, a 50 MHz clock, and huge power spikes, all of which (and all those long wires) are not suitable for a breadboard.

I've discovered an issue that only happens with the ETH_CLOCK_GPIO17_OUT clock, but not when the clock is external (fed to the esp via gpio0). When there's traffic on the wifi STA channel, ETH r26 (the error counter) increases quite rapidly => there's noise and dropped frames. And if I start the wifi AP, the errors climb to the point that the ETH activity LED is flashing constantly => even more noise yet, to the point that proper ETH comms become nearly impossible due to the number of dropped/corrupted packets. I don't recall any of that happening when I had it setup with the external clock in ETH_CLOCK_GPIO0_IN mode.

So in these first stages, to test things, if I were you, I would turn the wifi off with the 'wifioff' cmd.

[padagra]

I will move to prototyping PCBs and away from the breadboard. Also I will try turning off the WiFi as you have suggested.

I have some 50mhz crystals coming in the mail today in addition to some NCP302HSN27T1G. I am going to attempt to move the clock and timing portion off of the ESP32s plate. It seems like with your breadboard success and with wESP32 moving to external oscillators, this may be the way to go.

https://www.mouser.com/datasheet/2/464/IDT_XL-Crystal-Oscillators-Datasheet_DST_20180907-961566.pdf
https://www.mouser.com/datasheet/2/308/NCP302-D-951758.pdf

[GeorgeOfTheJungle]

Can you try this? Put it immediately after the call to ETH.begin():

Code: [Select]

ETH.begin(...);
esp_eth_smi_write(4, bin2u16("000000 0 0011 00001"));
This makes it connect at 10 Mbps max (10BASE-T). At 10Mbps I can turn on the WiFi AP and STA and communicate simultaneously through all channels at the same time with no errors/dropped packets: ETH, WiFi AP and WiFi STA. If your problem is noise, this may help.

Edit:
I've updated the gist:

https://gist.github.com/xk/0c08f8a2c49b35a5e0a38aad2dc6f0ee

Now it boots in 10BASE-T and can switch modes with the commands eth10 and eth100.

[GeorgeOfTheJungle]

I will move to prototyping PCBs and away from the breadboard. Also I will try turning off the WiFi as you have suggested.

I have some 50mhz crystals coming in the mail today in addition to some NCP302HSN27T1G. I am going to attempt to move the clock and timing portion off of the ESP32s plate. It seems like with your breadboard success and with wESP32 moving to external oscillators, this may be the way to go.

https://www.mouser.com/datasheet/2/464/IDT_XL-Crystal-Oscillators-Datasheet_DST_20180907-961566.pdf

https://www.mouser.com/datasheet/2/308/NCP302-D-951758.pdf

1) I don't think the NCP302 reset chip is needed because the amazon 8720 board has nRST left floating/Not Connected and it works well. BTW, the datasheet contradicts itself, says it's got an internal power-on reset circuitry:

- "Integrated power-on reset circuit" (page 1).
- "Note 2.1 Configuration strap values are latched on power-on reset and system reset" (page 11)
- "Note 2.2 Configuration strap values are latched on power-on reset and system reset" (page 12)
- "When enabled, auto-negotiation is started by the occurrence of one of the following events:  Hardware reset
 Software reset
 Power-down reset" (page 24).
- "Note: The Primary interrupt mode is the default interrupt mode after a power-up or hard reset. The Alternative interrupt mode requires setup after a power-up or hard reset."
- "The Primary interrupt system is always selected after power-up or hard reset"
- "Configuration straps are latched upon Power-On Reset (POR) and pin reset (nRST)." (page 39)
- "Varying the voltage up or down after the transceiver has completed power-on reset can cause errors in the transceiver operation" (page 38)

But then it says...

- "Hardware Reset
A Hardware reset is asserted by driving the nRST input pin low. When driven, nRST should be held low for the minimum time detailed in Section 5.5.3, "Power-On nRST & Configuration Strap Timing," on page 70 to ensure a proper transceiver reset. During a Hardware reset, an external clock must be supplied to the XTAL1/CLKIN signal.
Note: A hardware reset (nRST assertion) is required following power-up. Refer to Section 5.5.3, "Power-On nRST & Configuration Strap Timing," on page 70 for additional information."

2) A weird thing in the amazon board is that it has LED1/REGOFF connected with 330R to VDDA which in principle would imply REGOFF, but the regulator is enabled. I removed 330R and put a 4k7 pulldown to be sure, and it made no difference. The high-ish forward V of the LED is doing the trick I guess:

3.7.3.1 Disabling the Internal +1.2V Regulator
To disable the +1.2V internal regulator, a pull-up strapping resistor should be connected from the REGOFF configuration strap to VDD2A. At power-on, after both VDDIO and VDD2A are within specification, the transceiver will sample REGOFF to determine whether the internal regulator should turn on. If the pin is sampled at a voltage greater than VIH, then the internal regulator is disabled and the system must supply +1.2V to the VDDCR pin. The VDDIO voltage must be at least 80% of the operating voltage level (1.44V when operating at 1.8V, 2.0V when operating at 2.5V, 2.64V when operating at 3.3V) before voltage is applied to VDDCR. As described in Section 3.7.3.2, when REGOFF is left floating or connected to VSS, the internal regulator is enabled and the system is not required to supply +1.2V to the VDDCR pin.

3) When I look at CLKIN in the 8720 (with the low pass filter disabled in the scope) I see a signal that goes much below GND and above 3.3, so I've put a higher resistance in the esp clock output (gpio17) to make it be 3.3 peak to peak, from just above GND to just below 3.3, at the 8720 CLKIN pin.

4) You can use the Mac's ethernet port to do the tests, just have to enable internet sharing in the control panel. If you do that you can peek at the packets with WireShark and see exactly what's being sent (or not!) by the esp, and what's being sent by the Mac (and perhaps missed by the esp?). For example, when I have noise (in 100BASE-T mode + Wifi AP on) I can see the esp is missing many response ACK packets sent by the Mac and therefore retransmitting unnecessarily. If you see packets coming from the 8710 in the Mac you know TX is working. If you see replies sent by the Mac that the esp seems to be missing/ignoring, you'll know you've got a problem in RX.

[padagra]

Hello again! Been a few days here.

So I moved to your revised codebase and put R9 back. The good news? It connects immediately. The bad news? We are back to a no link LED light and high current draw (3.3v @ .29a, 957ma) with the 8710a heating up again..


With 10k in R9, it shows clean connection on the serial monitor:

Code: [Select]

18:57:02.421 -> Nov  6 2019 18:26:41
18:57:02.421 -> IDF-VERSION: v3.2.3-14-gd3e562907
18:57:02.421 -> ESP.     getSketchSize(): 653472
18:57:02.421 -> ESP.getFreeSketchSpace(): 1310720
18:57:02.421 -> STA MAC Address: 24 0a c4 23 fc 24
18:57:02.421 ->  AP MAC Address: 24 0a c4 23 fc 25
18:57:02.421 ->  BT MAC Address: 24 0a c4 23 fc 26
18:57:02.421 -> ETH MAC Address: 24 0a c4 23 fc 27
18:57:02.421 ->
18:57:02.421 -> Hi! We're in the loop()
18:57:02.951 ->
18:57:02.951 -> [Event #1] 21: ETH started
18:57:44.967 -> [Event #2] 23: ETH connected
18:57:44.967 -> [Event #3] 25: ETH Obtained IP address
18:57:44.967 -> ETH MAC:24:0A:C4:23:FC:27 IP:192.168.1.86 10Mbps/FD
18:58:38.969 -> [Event #4] 24: ETH disconnected

If I send the command "eth100" it reconnects and the link LED turns on! But there's still a high amperage draw (3.3v @ .26a, 858ma). Despite the high amperage draw it appears to hold the connection with the data visible through wireshark.



My thought with the NPC302 is to just duplicate the setup the wESP32 has (replace the microcontroller he has with the NPC302) in an attempt to be done digging for this ghost of an issue.

What pull up resistors are you using for the PHY select mode? 2.2k or 10k? I've got 2.2k.

Another note here, the high amperage draw ONLY happens when the ethernet cable is plugged in. Unplug the cable and the amperage goes back down. So something about the connection state is causing the 8710a to draw more power than it needs. 🤷‍♂️


Edit 1:
After the 30 ohm resistor, I'm getting -240mv vMin and +2.96v vMax totalling to ~3.2v peak to peak.

[GeorgeOfTheJungle]

Hi!

That LED is speed not link, it lights @100 and is off @10 Mbps, so that's ok. My power figures are (I did a wifioff first, and the cpu is running @240MHz):

Code: [Select]

wifioff+ nothing connected: 5V*0.12A=  0.6W
wifioff+  eth100 connected: 5V*0.16A=  0.8W
wifioff+   eth10 connected: 5V*0.19A= 0.95W
wifiap+  nothing connected: 5V*0.19A= 0.95W
wifiap+   eth100 connected: 5V*0.24A=  1.2W
wifiap+    eth10 connected: 5V*0.28A=  1.4W
wifioff+  ethoff          : 5V*0.07A= 0.35W
I'm using two 5->3.3 LDOs, one for the esp32 and another one for the 8720 board.

MODE0..2 have no pullups in the chinese board, but each has a 10Ω R in series.

If you put it in 10BASE-T + wifioff (that's how it boots now), does it *always* reconnect fine? Even with POE?

[GeorgeOfTheJungle]

I removed R9 and IMMEDIATELY it started working correctly. WHAT IS BETTER is the 8710a chip no longer is getting hot and my current draw is down to a total of .726 watts. (3.3v at .23a)
[...]
Final note before bed - if R9 is removed and I power up with the bench PSU on just 3.3v, it works flawlessly. Connects immediately. If I leave nonPOE ethernet cable plugged in THEN power up the board, it works flawlessly. Immediate connection. So now something with the power/POE/3.3VLAN transistors is funky.
Edit 3:
Took another glance at it. My "3.3v" rail with POE is very noisy and has spikes upwards of 4.48v. It never rests at 3.3v, always high. I will need to look into this, I'll have to double check R27 and R5 to make sure they are the correct values for a proper 3.3v output, I suspect they are slightly off. That with a better smoothing capacitor and corrected 3.3v/3.3VLAN traces I hope this is the last of it.

Considering all is now working well with your revised code, no R9, and the bench PSU I would assume that the POE is capable of working the same way with the right 3.3v output.

You have to have clean power rails. If I were you I would do two things:

1.- Remove the SY8089, grab three (short-ish) wires and put the AMS1117 LDO in its place (you've got one in the (now defunct?) esp32 board). GND goes to GND, IN goes to pins 1 and 4 of the SY8089, and OUT goes to c5/c25/led4A/+3.3V. You've got two switching regulators one after the other. That's no problem if everything is working as intended, but in this case we've got lots of noise so it isn't => let's leave one out of the equation for now.

2.- If after that still doesn't work, jumper pins 2 and 3 of Q5 to be sure it isn't playing on/off due to noise.

How clean is (or isn't) the output of si3402 (+5VP) when feeding POE?

[padagra]

If you put it in 10BASE-T + wifioff (that's how it boots now), does it *always* reconnect fine? Even with POE?

No it does not connect with POE in this state, but does consistently connect without POE. I ordered a USB galvanic isolator so I can debug with POE hot, got it in yesterday. What I have found while using POE is that it recognizes an ethernet cable is plugged in via serial monitor "ETH Connected" and the ACT Led flashes but it will not get an IP address. Not sure how useful it is but Wireshark shows the following as if the ESP32 is trying to get an IP address (I think I'm reading this right):

How clean is (or isn't) the output of si3402 (+5VP) when feeding POE?

There is more noise when the router is plugged in. I captured both as a comparison on the three power rails +5vp, +3.3v, and +3.3vlan.

+5vp when powered by POE (router unplugged from POE injector):


+5vp when powered by POE (router plugged into POE injector):


+3.3v when powered by POE (router unplugged from POE injector):


+3.3v when powered by POE (router plugged into POE injector):


+3.3vLan when powered by POE (router unplugged from POE injector):


+3.3vLan when powered by POE (router plugged into POE injector):

You have to have clean power rails. If I were you I would do two things:

1.- Remove the SY8089, grab three (short-ish) wires and put the AMS1117 LDO in its place (you've got one in the (now defunct?) esp32 board). GND goes to GND, IN goes to pins 1 and 4 of the SY8089, and OUT goes to c5/c25/led4A/+3.3V. You've got two switching regulators one after the other. That's no problem if everything is working as intended, but in this case we've got lots of noise so it isn't => let's leave one out of the equation for now.

2.- If after that still doesn't work, jumper pins 2 and 3 of Q5 to be sure it isn't playing on/off due to noise.

Working this now, will post an update shortly.


Edit 1:
Okay, I removed the SY8089. Put the AMS1171-3.3 in place of it. It successfully is creating 3.3v. Scope shots:

+3.3v when powered by POE (router unplugged from POE injector):


+3.3v when powered by POE (router plugged into POE injector):


+3.3vLan when powered by POE (router unplugged from POE injector):


+3.3vLan when powered by POE (router plugged into POE injector):



Two concerning things this uncovered:
- The AMS1117-3.3 is getting very hot. I know linear regulators dissipate the excess voltage with heat but this is getting hot -> 146°F
- The board is now connecting with POE however it is running into brownouts. It connects, gets IP address, resets


Brownout as seen through serial monitor:

Code: [Select]

11:16:02.065 -> Hi! We're in the loop()
11:16:02.596 ->
11:16:02.596 -> [Event #1] 21: ETH started
11:16:06.638 -> [Event #2] 23: ETH connected
11:16:06.638 -> [Event #3] 25: ETH Obtained IP address
11:16:06.638 -> ETH MAC:24:0A:C4:23:FC:27 IP:192.168.1.86 10Mbps/FD
11:16:10.993 ->
11:16:10.993 -> Brownout detector was triggered
11:16:11.031 ->
11:16:11.031 -> ets Jun  8 2016 00:22:57
11:16:11.031 ->
11:16:11.031 -> rst:0xc (SW_CPU_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
11:16:11.031 -> configsip: 0, SPIWP:0xee
11:16:11.031 -> clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
11:16:11.031 -> mode:DIO, clock div:1
11:16:11.031 -> load:0x3fff0018,len:4
11:16:11.031 -> load:0x3fff001c,len:1044
11:16:11.031 -> load:0x40078000,len:8896
11:16:11.031 -> load:0x40080400,len:5816
11:16:11.031 -> entry 0x400806ac
11:16:11.678 ->
11:16:11.678 -> Nov  6 2019 18:26:41
11:16:11.678 -> IDF-VERSION: v3.2.3-14-gd3e562907
11:16:11.678 -> ESP.     getSketchSize(): 653472
11:16:11.678 -> ESP.getFreeSketchSpace(): 1310720
11:16:11.678 -> STA MAC Address: 24 0a c4 23 fc 24
11:16:11.678 ->  AP MAC Address: 24 0a c4 23 fc 25
11:16:11.678 ->  BT MAC Address: 24 0a c4 23 fc 26
11:16:11.678 -> ETH MAC Address: 24 0a c4 23 fc 27
11:16:11.678 ->
11:16:11.678 -> Hi! We're in the loop()
11:16:12.229 ->
11:16:12.229 -> [Event #1] 21: ETH started
11:16:16.228 -> [Event #2] 23: ETH connected
11:16:16.228 -> [Event #3] 25: ETH Obtained IP address
11:16:16.228 -> ETH MAC:24:0A:C4:23:FC:27 IP:192.168.1.86 10Mbps/FD
11:16:25.112 ->
11:16:25.112 -> Brownout detector was triggered
11:16:25.112 ->
11:16:25.112 -> ets Jun  8 2016 00:22:57
11:16:25.112 ->
11:16:25.112 -> rst:0xc (SW_CPU_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
11:16:25.112 -> configsip: 0, SPIWP:0xee
11:16:25.112 -> clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
11:16:25.112 -> mode:DIO, clock div:1
11:16:25.112 -> load:0x3fff0018,len:4
11:16:25.112 -> load:0x3fff001c,len:1044
11:16:25.112 -> load:0x40078000,len:8896
11:16:25.112 -> load:0x40080400,len:5816
11:16:25.112 -> entry 0x400806ac
11:16:25.745 ->
11:16:25.745 -> Nov  6 2019 18:26:41
11:16:25.745 -> IDF-VERSION: v3.2.3-14-gd3e562907
11:16:25.745 -> ESP.     getSketchSize(): 653472
11:16:25.745 -> ESP.getFreeSketchSpace(): 1310720
11:16:25.745 -> STA MAC Address: 24 0a c4 23 fc 24
11:16:25.745 ->  AP MAC Address: 24 0a c4 23 fc 25
11:16:25.745 ->  BT MAC Address: 24 0a c4 23 fc 26
11:16:25.745 -> ETH MAC Address: 24 0a c4 23 fc 27
11:16:25.745 ->
11:16:25.745 -> Hi! We're in the loop()
11:16:26.286 ->
11:16:26.286 -> [Event #1] 21: ETH started
11:16:30.292 -> [Event #2] 23: ETH connected
11:16:30.292 -> [Event #3] 25: ETH Obtained IP address
11:16:30.292 -> ETH MAC:24:0A:C4:23:FC:27 IP:192.168.1.86 10Mbps/FD
11:16:36.557 ->
11:16:36.557 -> Brownout detector was triggered


[GeorgeOfTheJungle]

If you put it in 10BASE-T + wifioff (that's how it boots now), does it *always* reconnect fine? Even with POE?

No it does not connect with POE in this state, but does consistently connect without POE. I ordered a USB galvanic isolator so I can debug with POE hot, got it in yesterday. What I have found while using POE is that it recognizes an ethernet cable is plugged in via serial monitor "ETH Connected" and the ACT Led flashes but it will not get an IP address. Not sure how useful it is but Wireshark shows the following as if the ESP32 is trying to get an IP address (I think I'm reading this right):

Either the Mac isn't responding (are you sure internet sharing was on?) or it's responding and the 8710 is deaf/missing the response (rx err). You can look with the scope at pin RXER, 8710 pin13, if you see positive pulses there you've got rx errors. If I turn on wifiap and it's in 100BASE-T I get them too, it still works fine but comms are slow. Not in 10BASE-T.

The noise I've got in +3.3 is less than 200mV pk-pk. But when I looked at it, the scope's GND was connected at the USB cable input GND, not at the 8710 board input GND. If I put the GND clip there I think the noise I'll see will be less than that.

Try to find something to solder the LDO to so that it can dissipate that heat. It's good for up to 1 amp, that's 3.3W => it should be able to cope with the 8710 and the esp, no problem. IDK if there other things drawing power beside these two in your board?

[padagra]

Either the Mac isn't responding (are you sure internet sharing was on?) or it's responding and the 8710 is deaf/missing the response (rx err). You can look with the scope at pin RXER, 8710 pin13, if you see positive pulses there you've got rx errors. If I turn on wifiap and it's in 100BASE-T I get them too, it still works fine but comms are slow. Not in 10BASE-T.

I'll probe it out when I get home this evening (1:35pm here) but I find it's odd that without POE it successfully gets an IP address (yes internet sharing is on).

The noise I've got in +3.3 is less than 200mV pk-pk. But when I looked at it, the scope's GND was connected at the USB cable input GND, not at the 8710 board input GND. If I put the GND clip there I think the noise I'll see will be less than that.

My scope's ground is tied to an exposed ground pin I have available on the programming header if that makes a difference.

Try to find something to solder the LDO to so that it can dissipate that heat. It's good for up to 1 amp, that's 3.3W => it should be able to cope with the 8710 and the esp, no problem. IDK if there other things drawing power beside these two in your board?

No there is nothing else turned on that would actively be trying to draw power from 3.3v besides the ESP32 and the 8710a. It should not even be close to 3.3w.