I received the firmware, although a different version, but it's worth a try.
Since the code for the algorithms is small and should fit in 256 bytes, I decided to edit the closest one from the flashburn utility kit.
The flashburn utility declares "limited untested support" for this series of processors. Finally, after many years, I tested it and can say that the algorithms do not work. Additional correction of *.out files is needed. So far, I was able to run the precondition/clear algorithm in the CCS 3.3 environment, and it worked correctly.
I found that all algorithms are configured to use a clock frequency of 20 MHz. Since the write pulses are generated by software cycles, this is very critical. Therefore, in the CCS 3.3 environment, it is necessary to correct the CKCR0 registers at address 0x702A and CKCR1 at address 0x702C in the data space. Since I have a 4 MHz crystal, I first wrote 0 to CKCR0, then 0x00E4 to CKCR1, and finally 0x00C3 to CKCR0.
If you load *.out files into the 0xFE00 program space, you need to write ST1 "FFFF" after each reset to set the CNF bit. You also need to pay attention to the SXM bit if you start the program from the middle. If you can't set the Program Counter, you need to debug->reset. Also remember that registers in the register field can only be written in full (by entering 4 digits), although in the data window (CKCR0,...) this is not necessary.