EEVblog Electronics Community Forum
Electronics => Microcontrollers => Topic started by: sci4me on July 30, 2013, 05:19:30 am
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Hi guys. So, I have been messing around with my FPGA board, slowly learning verilog, and currently, I am working on designing a "simplistic" cpu. It does work, it can read instructions and execute them, it has a fairly decent amount of instructions implemented. However, just now, I tried to change a few things and all of the sudden, whenever I compile, it just says 0 LE's. So its not compiling the processor or any of the other stuff (pll, ram, etc). All I tried to do was change a register name and size... and add a few instructions. Im wondering if there is some way I can see what the issue is or if I have to figure it out myself. The warnings dont seem to have anything to do with it, but im not sure...
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You need to give us a bit more like the code you changed or the warning messages when you compile. If some error occurred that is only a warning the compiler won't create the hardware.
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Been there, done that. That usually happens when there is some major path broken, so that no input signals actually have any effect on the output so the compiler/synthesizer just removes all "unnecessary" stuff as an optimization. See analysis & synthesis connectivity check report of compilation report if that gives any clue what is missing.
Regards,
Janne
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Not sure what I did, but I put it into a brand new project and BOOM, the processor starts running a program. :)
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The obvious culprit is to accidentally disconnect the clock from any of the external pins.
That way the synth optimiser will say "nothing is clocked and there for I can remove
everything" :palm: