Author Topic: PHY (KSZ8091RNA) configuration issue w/ STM32F427  (Read 1383 times)

0 Members and 1 Guest are viewing this topic.

Offline PDP-1Topic starter

  • Contributor
  • Posts: 15
  • Country: us
  • Spacewar!
PHY (KSZ8091RNA) configuration issue w/ STM32F427
« on: December 07, 2023, 01:20:48 am »
Hi all,

I am trying to get a KSZ8091RNA Ethernet PHY chip working on a board I made with an STM32F427 and ran into trouble. The F427 seems to be working and it can talk to the PHY chip over MDIO, however the PHY seems to be stuck in 'waiting for auto-negotiation to complete' state and it reports seeing no signal on its RX inputs.

When I put a scope on the RX lines I see a consistent ~15.6kHz pulse which I assume is some kind of low-duty cycle probe signal looking for new connections. So there is a signal there and it is getting through the magnetics inside the 08B0-1X1T-06-F RJ45 jack, to the copper trace leading to the RX pins on the PHY.

I've tried resetting the PHY via the external line and via the internal register bit that you set to 1 and wait to go back to 0 to indicate the job is done. I also tried removing the ESD protection chip in case it was loading something down or mis-wired, but no luck. I also re-checked the pin layout in the datasheets multiple times. Finally, I had a couple of copies of this board made and none of them work so it seems unlikely that I just got a randomly bad PHY chip.

Any suggestions as to what to try next? I'm running out of ideas.

Thanks!
 

Offline PDP-1Topic starter

  • Contributor
  • Posts: 15
  • Country: us
  • Spacewar!
Re: PHY (KSZ8091RNA) configuration issue w/ STM32F427
« Reply #1 on: December 07, 2023, 09:14:11 pm »
Is your X501 working? Do you have an active probe to confirm it's oscillating at the right frequency? Is it a crystal or a MEMS oscillator?

You are correct, X501 was not working! I guess I just assumed that if the PHY was talking over MDIO it must have a clock signal, but apparently the MDIO section of the chip is clocked entirely via the MDC line coming out of the STM32 while the rest of the internals are run off the 50MHz oscillator. With the crystal not oscillating I could still talk to the PHY but the Rx/Tx pins don't do anything which is what I saw.

Luckily, I had the board set up to allow me to choose between a 50MHz local crystal or a 50MHz clock line derived from the microcontroller's crystal via the MCO2 pin. I disconnected R506 to disable the crystal and populated R524 with a 0Ω resistor to get the MCO2 signal to the PHY and the Tx/Rx outputs came to life!

Thanks so much for your help!
 

Offline bson

  • Supporter
  • ****
  • Posts: 2270
  • Country: us
Re: PHY (KSZ8091RNA) configuration issue w/ STM32F427
« Reply #2 on: December 08, 2023, 01:15:40 am »
Checking the datasheet, it only seems to support a 25MHz crystal for the internal oscillator.  With a 50MHz external reference it's always single-pin, either oscillator (sinusoidal) or a clock (square wave).  Figures 10-1, 10-2.
 

Offline PDP-1Topic starter

  • Contributor
  • Posts: 15
  • Country: us
  • Spacewar!
Re: PHY (KSZ8091RNA) configuration issue w/ STM32F427
« Reply #3 on: December 08, 2023, 03:22:24 am »
I think either variant can support both 25MHz and 50MHz clocks, setting register 0x1F bit 7 toggles between the two modes.

Which makes me wonder why they put out two variants of the chip, the RNA being natively 25MHz and the RND being natively 50MHz, when flipping that one bit effectively changes one into the other.


Incorrect on my part, bson got it right
« Last Edit: December 09, 2023, 12:42:46 am by PDP-1 »
 

Offline PDP-1Topic starter

  • Contributor
  • Posts: 15
  • Country: us
  • Spacewar!
Re: PHY (KSZ8091RNA) configuration issue w/ STM32F427
« Reply #4 on: December 09, 2023, 12:41:32 am »
Luckily, I had the board set up to allow me to choose between a 50MHz local crystal or a 50MHz clock line derived from the microcontroller's crystal via the MCO2 pin.

I don't know what your layout looks like but be aware that a single 0402 pad can have 2-4 pF of capacitance and can easily detune a crystal (especially if the load caps are mis-sized in the first place).

I attached a screenshot of the PHY layout, the crystal is midway down on the left side. I had guessed 6pF for the traces. (but as discussed below, it was the wrong crystal to use)

Checking the datasheet, it only seems to support a 25MHz crystal for the internal oscillator.  With a 50MHz external reference it's always single-pin, either oscillator (sinusoidal) or a clock (square wave).  Figures 10-1, 10-2.

After thinking about it some more I believe you're correct here. I copied the part of the manual that made me think I should just use a 50MHz crystal for 50MHz mode, but then in the text near figures 10-1 and 10-2 I see

Quote
A crystal or external clock source, such as an oscillator, is used to provide the reference clock for the KSZ8091RNA/RND. For the KSZ8091RNA/RND in all operating modes and for the KSZ8091RND in RMII - 25 MHz Clock Mode, the reference clock is 25 MHz. The reference clock connections to X1 (Pin 8 ) and X0 (Pin 7), and the reference clock selection criteria, are provided in Figure 10-1 and Table 10-1.

So it looks like I should have used a 25MHz crystal. I was wondering what I did wrong there. Thanks!

I did learn one other detail about running this PHY off the 50MHz digital input which is that you have to then route that same clock line to the ETH_REFCLOCK pin on the STM32. If you feed the PHY a 25MHz clock it generates the 50MHz signal for you and puts it out the REF_CLK pin, when you give it a 50MHz clock it stops giving output on the REF_CLK line. The ETH_REFCLOCK pin runs the whole output end of the STM32's MAC peripheral - without applying the external clock the MAC doesn't do anything.
 


Share me

Digg  Facebook  SlashDot  Delicious  Technorati  Twitter  Google  Yahoo
Smf