Life's too short to wade through Microchip's (incomplete) errata, and anecdotal evidence on their forum to figure out exactly which of the early LVP capable PICs can be affected by glitches or high levels on PGM at HV programming mode entry, or while HV programming is in progress.
In all cases, if a PIC has a seperate PGM pin for LVP mode entry, wire it to pin 6 (AUX/LVP) of the ICSP connector, and if the target board is capable of driving it with a 'stiff' logic '1', add an isolation resistor between it and the rest of the target board. Ensure HV programming is selected in whatever software your programmer uses, and simply let the programmer handle it.
The fuse to disable LVP programming cant be disabled in LVP mode. If its left enabled, you cant disable /MCLR or use the PGM pin for I/O. Also a floating PGM pin at runtime can cause unwanted LV Programming mode entry, which if its brief enough has apparent symptoms closely resembling an unintended device reset.