### Author Topic: Serial parity bit  (Read 3285 times)

0 Members and 1 Guest are viewing this topic.

#### Circlotron

• Super Contributor
• Posts: 1904
• Country:
##### Serial parity bit
« on: September 30, 2015, 10:10:06 pm »
Hi all. Just writing some bit banging software in assembly for a HC08. Getting confused about the parity bit. Say we are running even parity. Does that mean that if there are an even number of 1's in a given frame then the parity bit is set to show that there is an even number, or that if there is an odd number then the parity bit is set to make it up to an even number?

Also, is the start bit included in the bit count? What about the stop bit?

Also also, assuming a 1 is low, the start bit is low and the stop bit is high?

Is the parity bit low or high?

Does the parity bit come just before the stop bit?

Spent lots of time going around in circles lately
« Last Edit: September 30, 2015, 10:13:44 pm by Circlotron »

#### djacobow

• Super Contributor
• Posts: 1066
• Country:
• takin' it apart since the 70's
##### Re: Serial parity bit
« Reply #1 on: September 30, 2015, 10:21:16 pm »
From wikipedia:

https://en.wikipedia.org/wiki/Serial_port#Parity
"
Parity is a method of detecting errors in transmission. When parity is used with a serial port, an extra data bit is sent with each data character, arranged so that the number of 1 bits in each character, including the parity bit, is always odd or always even. If a byte is received with the wrong number of 1s, then it must have been corrupted. However, an even number of errors can pass the parity check.
"

So the parity bit is set to one if ODD parity and the number of ones in the word transmitted is even. The results in an odd number of ones, total.

If the parity were even and the number of ones in the word was even, then the bit would be clear, keeping it even.

Personally, I say N,8,1 or go home. :-)
« Last Edit: September 30, 2015, 10:28:06 pm by djacobow »

#### suicidaleggroll

• Super Contributor
• Posts: 1455
• Country:
##### Re: Serial parity bit
« Reply #2 on: September 30, 2015, 10:21:32 pm »
This goes through it at a pretty low level:
http://www.unm.edu/~zbaker/ece238/slides/UART.pdf

This is also a case when grabbing a computer with a USB to UART adapter and a logic analyzer is immensely helpful.  Configure hyperterminal/putty/kermit/minicom with your settings, including parity, then send a few characters out on the UART and capture them with a LA to see what it sent.
« Last Edit: September 30, 2015, 10:24:54 pm by suicidaleggroll »

#### Circlotron

• Super Contributor
• Posts: 1904
• Country:
##### Re: Serial parity bit
« Reply #3 on: October 01, 2015, 01:48:53 am »
Personally, I say N,8,1 or go home. :-)
I am building a board that communicates with an automatic sliding door so I have to fit in with what it wants - 1200,E,8,1 so far as I can determine.

What I  understand so far is this:

Data line is normally +12V
Start bit goes to 0V for 833uS (logic 1)
8 data bits - logic 1 = 0V
If odd number of zeros in byte then parity bit goes low (logic 1) to make even number (= even parity)
Stop bit goes +12V (logic 0)

Is each of these points correct?

#### Circlotron

• Super Contributor
• Posts: 1904
• Country:
##### Re: Serial parity bit
« Reply #4 on: October 01, 2015, 01:58:05 am »
This pic shows start bit as 1 and stop bit as 0
http://www.csurambox.com/documents/report/images/report_img_12.jpg

And this pic shows start bit as 0 and stop bit as 1

Any wonder I am confused.

#### suicidaleggroll

• Super Contributor
• Posts: 1455
• Country:
##### Re: Serial parity bit
« Reply #5 on: October 01, 2015, 02:00:01 am »
This pic shows start bit as 1 and stop bit as 0
http://www.csurambox.com/documents/report/images/report_img_12.jpg

And this pic shows start bit as 0 and stop bit as 1

Any wonder I am confused.

TTL UART and RS232 polarity is swapped.  UART idles high, RS232 idles low.
http://www.artekit.eu/ak-3232-usage-guide/
« Last Edit: October 01, 2015, 02:06:58 am by suicidaleggroll »

#### helius

• Super Contributor
• Posts: 3013
• Country:
##### Re: Serial parity bit
« Reply #6 on: October 01, 2015, 05:45:39 am »
Data line is normally +12V
Start bit goes to 0V for 833uS (logic 1)
8 data bits - logic 1 = 0V
If odd number of zeros in byte then parity bit goes low (logic 1) to make even number (= even parity)
Stop bit goes +12V (logic 0)

Is each of these points correct?
RS-232-C swings both ways around 0 V. 0 V is an invalid state.

The descriptions online are confusing because they tend to use the wrong terms. In serial comms, there is not "high and low", the line states are referred to as mark and space. Originally "mark" and "space" referred to the holes in a paper tape attached to a teletype. It's important to get the right concepts, because serial communications can use different voltage levels and electrical signals, while keeping the same logical format. You could think of it as "Layer 1/Layer 0" in the OSI model: the format of marks and spaces is Layer 1, but the interpretation of those marks as voltages is at a lower level that could take multiple forms. RS-232-C, EIA-422, EIA-423, EIA-485, and current loop have the same marks but are electrically different. When you use "TTL UART", the voltage levels are different, but the marks and timing are still the same. That's why you can convert between TTL and RS-232 levels with ordinary transistors.

Data words are sent with logical 1 as a mark, 0 as a space. The start bit is always a space, and the stop bit(s) are always marks. In between words the idle state is mark. Each word starts with a start bit, then the bits of the data LSB first, (optional parity bit), and then 1 or 2 stop bits. The number of stop bits is not that important, because asynchronous serial comms idle in the same state (marking). The stop bits act as a minimum idle time between words. So if you send 2 stop bits, and the receiver expects 1, it will still understand.

Parity is sent with different modes, either even, odd, mark, space, or no parity. Mark or space parity always sends mark or space in the parity bit. Even (odd) parity sends a bit, so that the sum of the number of spaces in both the data and parity is even (odd). This means that a 7-bit word equal to 0x0 gets a different even parity than an 8-bit word with the same value. In practice the most common format is 8-N-1, so this isn't noticed.

The voltage levels assigned to a mark and space are a different issue and can be examined entirely separately from the above.
In RS-232-C, a mark is transmitted as -12 V and received from -2 to -25 V. A space is transmitted as +12 V and received from +2 to +25 V.
In EIA-423, a mark is transmitted as -5 V and received from -4 to -6 V. A space is transmitted as +5 V and received from +4 to +6 V.
In EIA-422, signals are balanced between two wires, with the common-mode voltage ignored, and the differential voltage (noninverted minus inverted) being transmitted as -5 V for a mark, +5 V for a space, and received from -.200 V to -12 V, and +.200 V to +12 V respectively.
TTL transmits a mark as Vcc and a space as Gnd. Converting between these different electrical standards just uses transceivers that know nothing about bits or baud rates. On the other side, when you program software, the only thing that matters is the marks and spaces.

Edit: mind your +s and -s
« Last Edit: October 01, 2015, 03:26:57 pm by helius »

#### Circlotron

• Super Contributor
• Posts: 1904
• Country:
##### Re: Serial parity bit
« Reply #7 on: October 01, 2015, 12:19:51 pm »
Righteo, got it all sorted out now! Thanks for your help everybody.

Smf