SOLVED: PIC18F4620: LCD Program complied but not running on hardware

[yashrk]

Hey guys,
               I am working on a project using PIC18f4620 in MPLAB X 3.30 using XC8 compiler. I have compiled the code and found no errors in the program, I have simulated it in MPLAB and it works there but I am not able to run it on Hardware, I also tested the hardware using the same micro with a working Hex file and it works. I am not sure what I am doing wrong.
              Thank you for your help.
Regards,
YashRK.

Code: [Select]

/*
 * File:   main.c
 * Author: YASH
 *
 * Created on June 7, 2016, 4:00 PM
 */

#include <xc.h>
#include <P18F4620.h>
#include <stdlib.h>
#include <stdio.h>

// CONFIG1H
#pragma config OSC = HSPLL      // Oscillator Selection bits (HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1))
#pragma config FCMEN = OFF      // Fail-Safe Clock Monitor Enable bit (Fail-Safe Clock Monitor disabled)
#pragma config IESO = OFF       // Internal/External Oscillator Switchover bit (Oscillator Switchover mode disabled)

// CONFIG2L
#pragma config PWRT = OFF       // Power-up Timer Enable bit (PWRT disabled)
#pragma config BOREN = SBORDIS  // Brown-out Reset Enable bits (Brown-out Reset enabled in hardware only (SBOREN is disabled))
#pragma config BORV = 3         // Brown Out Reset Voltage bits (Minimum setting)

// CONFIG2H
#pragma config WDT = ON         // Watchdog Timer Enable bit (WDT enabled)
#pragma config WDTPS = 32768    // Watchdog Timer Postscale Select bits (1:32768)

// CONFIG3H
#pragma config CCP2MX = PORTC   // CCP2 MUX bit (CCP2 input/output is multiplexed with RC1)
#pragma config PBADEN = ON      // PORTB A/D Enable bit (PORTB<4:0> pins are configured as analog input channels on Reset)
#pragma config LPT1OSC = OFF    // Low-Power Timer1 Oscillator Enable bit (Timer1 configured for higher power operation)
#pragma config MCLRE = ON       // MCLR Pin Enable bit (MCLR pin enabled; RE3 input pin disabled)

// CONFIG4L
#pragma config STVREN = ON      // Stack Full/Underflow Reset Enable bit (Stack full/underflow will cause Reset)
#pragma config LVP = ON         // Single-Supply ICSP Enable bit (Single-Supply ICSP enabled)
#pragma config XINST = OFF      // Extended Instruction Set Enable bit (Instruction set extension and Indexed Addressing mode disabled (Legacy mode))

// CONFIG5L
#pragma config CP0 = OFF        // Code Protection bit (Block 0 (000800-003FFFh) not code-protected)
#pragma config CP1 = OFF        // Code Protection bit (Block 1 (004000-007FFFh) not code-protected)
#pragma config CP2 = OFF        // Code Protection bit (Block 2 (008000-00BFFFh) not code-protected)
#pragma config CP3 = OFF        // Code Protection bit (Block 3 (00C000-00FFFFh) not code-protected)

// CONFIG5H
#pragma config CPB = OFF        // Boot Block Code Protection bit (Boot block (000000-0007FFh) not code-protected)
#pragma config CPD = OFF        // Data EEPROM Code Protection bit (Data EEPROM not code-protected)

// CONFIG6L
#pragma config WRT0 = OFF       // Write Protection bit (Block 0 (000800-003FFFh) not write-protected)
#pragma config WRT1 = OFF       // Write Protection bit (Block 1 (004000-007FFFh) not write-protected)
#pragma config WRT2 = OFF       // Write Protection bit (Block 2 (008000-00BFFFh) not write-protected)
#pragma config WRT3 = OFF       // Write Protection bit (Block 3 (00C000-00FFFFh) not write-protected)

// CONFIG6H
#pragma config WRTC = OFF       // Configuration Register Write Protection bit (Configuration registers (300000-3000FFh) not write-protected)
#pragma config WRTB = OFF       // Boot Block Write Protection bit (Boot Block (000000-0007FFh) not write-protected)
#pragma config WRTD = OFF       // Data EEPROM Write Protection bit (Data EEPROM not write-protected)

// CONFIG7L
#pragma config EBTR0 = OFF      // Table Read Protection bit (Block 0 (000800-003FFFh) not protected from table reads executed in other blocks)
#pragma config EBTR1 = OFF      // Table Read Protection bit (Block 1 (004000-007FFFh) not protected from table reads executed in other blocks)
#pragma config EBTR2 = OFF      // Table Read Protection bit (Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks)
#pragma config EBTR3 = OFF      // Table Read Protection bit (Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks)

// CONFIG7H
#pragma config EBTRB = OFF      // Boot Block Table Read Protection bit (Boot Block (000000-0007FFh) not protected from table reads executed in other blocks)


//#include<P18F4620.h>
#include <string.h>

#define data PORTB
#define rs PORTDbits.RD6
#define en PORTDbits.RD7
#define _XTAL_FREQ 40000000

void delay(void);
void lcddata(unsigned char value);
void lcdcmd(unsigned char value);
void lcd_init();
void Lcd_Set_Cursor(char a, char b);
void lcd_data_string(char *a, unsigned int b);
void Lcd_Shift_Right();
void Lcd_Shift_Left();
void lcd_num(unsigned int a);

char dis1[] ="ABC";
char dis2[] ="India";


void main(){
    TRISB =0x00;                     // lcd 0-7
    TRISD =0x00;                     // D6, D7
    delay();
    lcd_init();
    delay();
   
//    Lcd_Set_Cursor(1,7);
//    delay();
//    lcd_data_string(dis1,3);
//    delay();
//    Lcd_Set_Cursor(2,6);
//    delay();
//    lcd_data_string(dis2,5);
//   
//    for(int i=0; i<1000; i++){
//        lcdcmd(0x01);
//        __delay_ms(10);
//        Lcd_Set_Cursor(1,1);
//        __delay_ms(10);
//        lcd_num(i);
//        __delay_ms(10);
//        delay();
//    }
   
    while(1){
        Lcd_Set_Cursor(1,1);
        delay();
        lcddata('A');
        delay();
    }
   
    delay();
}

void lcd_init(){
    en = 0;
    for(int i =0; i<25; i++)__delay_ms(10);
    lcdcmd(0x38);           
    for(int i =0; i<25; i++)__delay_ms(10);
//    lcdcmd(0x38);             
//    delay();
//    lcdcmd(0x38);           
//    delay();
    lcdcmd(0x0C);                //display on cursor off
    delay();
    lcdcmd(0x01);                //clear LCD
    delay();
    lcdcmd(0x06);               
    delay();
    lcdcmd(0x02);                //shift cursor right
    delay();
   
}

void Lcd_Set_Cursor(char a, char b){  //row, colum
char temp;
if(a == 1){
        temp = 0x80 + b - 1;
lcdcmd(temp);
}
else if(a == 2)
{
temp = 0xC0 + b - 1;
lcdcmd(temp);
}
    delay();
}

void lcdcmd(unsigned char value){
    data = value;
    rs =0;
    en =1;
    __delay_us(1);
    en =0;
   
}

void lcddata(unsigned char value){
    data = value;
    rs =1;
    en =1;
    __delay_us(1);
    en =0;
}

void delay(void) {
   
    __delay_ms(15);
}

void lcd_data_string(char *a, unsigned int b){ //(array, length)
int i;
for(i=0;i<b;i++){
        lcddata(a[i]);
        __delay_ms(2);
    }
}

void Lcd_Shift_Right(){
lcdcmd(0x01);
lcdcmd(0x0C);
}

void Lcd_Shift_Left(){
lcdcmd(0x01);
lcdcmd(0x08);
}

void lcd_num(unsigned int a){     //integer to be printed
    char buf[10];
    itoa(buf, a, 10);
    lcd_data_string(buf,5);
}



[Wilksey]

For starters, I can see you have enabled the watchdog timer, but not actually serviced it, this will cause you issues straight off!

[yashrk]

I just corrected it but still not working, I uploaded the code in PIC18 simulator too it's not even switching pins high and low (though PROTEUS is showing everything is fine and working right) for a long time and then pins B3, B4 & B5 goes high see the image.

[Skimask]

Another big sigh for the people that can't seem to be able to read datasheets...

#pragma config FCMEN = OFF      // Fail-Safe Clock Monitor Enable bit (Fail-Safe Clock Monitor disabled)

Why would you NOT turn the fail safe on?
At least if the main osc failed, something would run and it would be easily enough identified for troubleshooting.

#pragma config PWRT = OFF       // Power-up Timer Enable bit (PWRT disabled)

Again, why not let everything steady out before letting the mcu run?
Again, I don't get it...  Does that few ms of time really matter?

#pragma config WDT = ON         // Watchdog Timer Enable bit (WDT enabled)

And this is handled where?

#pragma config PBADEN = ON      // PORTB A/D Enable bit (PORTB<4:0> pins are configured as analog input channels on Reset)

So, what you're saying is that the pins on Port B aren't working correctly?
Really?
Wonder why...

#define data PORTB

I'll bet you'd find the answer in the datasheet...wherever that's at...

[yashrk]

I am sorry @Skimask, I let you down. I will make sure that I will read the datasheet and understand every configuration registers. I have updated the code please have a look, it still doesn't work. And I am sorry I didn't understand what I did wrong about

Code: [Select]

#define data PORTB
Thank you.

Here is the updated code

Code: [Select]


/*
 * File:   main.c
 * Author: YASH
 *
 * Created on June 7, 2016, 4:00 PM
 */

#include <xc.h>
//#include <P18F4620.h>
#include <stdlib.h>
//#include <stdio.h>


// PIC18F4620 Configuration Bit Settings

// 'C' source line config statements

// #pragma config statements should precede project file includes.
// Use project enums instead of #define for ON and OFF.

// CONFIG1H
#pragma config OSC = HSPLL      // Oscillator Selection bits (HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1))
#pragma config FCMEN = ON       // Fail-Safe Clock Monitor Enable bit (Fail-Safe Clock Monitor enabled)
#pragma config IESO = OFF       // Internal/External Oscillator Switchover bit (Oscillator Switchover mode disabled)

// CONFIG2L
#pragma config PWRT = ON        // Power-up Timer Enable bit (PWRT enabled)
#pragma config BOREN = SBORDIS  // Brown-out Reset Enable bits (Brown-out Reset enabled in hardware only (SBOREN is disabled))
#pragma config BORV = 3         // Brown Out Reset Voltage bits (Minimum setting)

// CONFIG2H
#pragma config WDT = OFF        // Watchdog Timer Enable bit (WDT disabled (control is placed on the SWDTEN bit))
#pragma config WDTPS = 32768    // Watchdog Timer Postscale Select bits (1:32768)

// CONFIG3H
#pragma config CCP2MX = PORTC   // CCP2 MUX bit (CCP2 input/output is multiplexed with RC1)
#pragma config PBADEN = OFF     // PORTB A/D Enable bit (PORTB<4:0> pins are configured as digital I/O on Reset)
#pragma config LPT1OSC = OFF    // Low-Power Timer1 Oscillator Enable bit (Timer1 configured for higher power operation)
#pragma config MCLRE = ON       // MCLR Pin Enable bit (MCLR pin enabled; RE3 input pin disabled)

// CONFIG4L
#pragma config STVREN = ON      // Stack Full/Underflow Reset Enable bit (Stack full/underflow will cause Reset)
#pragma config LVP = ON         // Single-Supply ICSP Enable bit (Single-Supply ICSP enabled)
#pragma config XINST = OFF      // Extended Instruction Set Enable bit (Instruction set extension and Indexed Addressing mode disabled (Legacy mode))

// CONFIG5L
#pragma config CP0 = OFF        // Code Protection bit (Block 0 (000800-003FFFh) not code-protected)
#pragma config CP1 = OFF        // Code Protection bit (Block 1 (004000-007FFFh) not code-protected)
#pragma config CP2 = OFF        // Code Protection bit (Block 2 (008000-00BFFFh) not code-protected)
#pragma config CP3 = OFF        // Code Protection bit (Block 3 (00C000-00FFFFh) not code-protected)

// CONFIG5H
#pragma config CPB = OFF        // Boot Block Code Protection bit (Boot block (000000-0007FFh) not code-protected)
#pragma config CPD = OFF        // Data EEPROM Code Protection bit (Data EEPROM not code-protected)

// CONFIG6L
#pragma config WRT0 = OFF       // Write Protection bit (Block 0 (000800-003FFFh) not write-protected)
#pragma config WRT1 = OFF       // Write Protection bit (Block 1 (004000-007FFFh) not write-protected)
#pragma config WRT2 = OFF       // Write Protection bit (Block 2 (008000-00BFFFh) not write-protected)
#pragma config WRT3 = OFF       // Write Protection bit (Block 3 (00C000-00FFFFh) not write-protected)

// CONFIG6H
#pragma config WRTC = OFF       // Configuration Register Write Protection bit (Configuration registers (300000-3000FFh) not write-protected)
#pragma config WRTB = OFF       // Boot Block Write Protection bit (Boot Block (000000-0007FFh) not write-protected)
#pragma config WRTD = OFF       // Data EEPROM Write Protection bit (Data EEPROM not write-protected)

// CONFIG7L
#pragma config EBTR0 = OFF      // Table Read Protection bit (Block 0 (000800-003FFFh) not protected from table reads executed in other blocks)
#pragma config EBTR1 = OFF      // Table Read Protection bit (Block 1 (004000-007FFFh) not protected from table reads executed in other blocks)
#pragma config EBTR2 = OFF      // Table Read Protection bit (Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks)
#pragma config EBTR3 = OFF      // Table Read Protection bit (Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks)

// CONFIG7H
#pragma config EBTRB = OFF      // Boot Block Table Read Protection bit (Boot Block (000000-0007FFh) not protected from table reads executed in other blocks)




//#include<P18F4620.h>
#include <string.h>

//#define data PORTB           //LATB         
#define rs   PORTDbits.RD6   //LATBbits.LB6             
#define en   PORTDbits.RD7   //LATBbits.LB7             
#define _XTAL_FREQ 40000000

void delay(void);
void lcddata(unsigned char value);
void lcdcmd(unsigned char value);
void lcd_init();
void Lcd_Set_Cursor(char a, char b);
void lcd_data_string(char *a, unsigned int b);
void Lcd_Shift_Right();
void Lcd_Shift_Left();
void lcd_num(unsigned int a);

char dis1[] ="ABC";
char dis2[] ="India";


void main(){
    TRISB =0x00;                     // lcd 0-7
    TRISD =0x00;                     // D6, D7
    ADCON0 = 0x00;                   // all pins digital
   
//    PORTB = 0xFF;
//    for(int i=0; i<100; i++){;} __delay_ms(10);
//    PORTB = 0x00;
//    for(int i=0; i<100; i++){;} __delay_ms(10);
   
    delay();
    lcd_init();
    delay();
   
//    Lcd_Set_Cursor(1,7);
//    delay();
//    lcd_data_string(dis1,3);
//    delay();
//    Lcd_Set_Cursor(2,6);
//    delay();
//    lcd_data_string(dis2,5);
//   
//    for(int i=0; i<1000; i++){
//        lcdcmd(0x01);
//        __delay_ms(10);
//        Lcd_Set_Cursor(1,1);
//        __delay_ms(10);
//        lcd_num(i);
//        __delay_ms(10);
//        delay();
//    }
   
    while(1){
        Lcd_Set_Cursor(1,1);
        delay();
        lcddata('A');
        delay();
    }
//   
//    delay();
}

void lcd_init(){
    en = 0;
    for(int i =0; i<25; i++)__delay_ms(10);
    lcdcmd(0x38);           
    for(int i =0; i<25; i++)__delay_ms(10);
//    lcdcmd(0x38);             
//    delay();
//    lcdcmd(0x38);           
//    delay();
    lcdcmd(0x0C);                //display on cursor off
    delay();
    lcdcmd(0x01);                //clear LCD
    delay();
    lcdcmd(0x06);               
    delay();
    lcdcmd(0x02);                //shift cursor right
    delay();
   
}

void Lcd_Set_Cursor(char a, char b){  //row, colum
char temp;
if(a == 1){
        temp = 0x80 + b - 1;
lcdcmd(temp);
}
else if(a == 2)
{
temp = 0xC0 + b - 1;
lcdcmd(temp);
}
    delay();
}

void lcdcmd(unsigned char value){
    PORTB = value;
    rs =0;
    en =1;
    __delay_us(1);
    en =0;
   
}

void lcddata(unsigned char value){
    PORTB = value;
    rs =1;
    en =1;
    __delay_us(1);
    en =0;
}

void delay(void) {
   
    __delay_ms(15);
}

void lcd_data_string(char *a, unsigned int b){ //(array, length)
int i;
for(i=0;i<b;i++){
        lcddata(a[i]);
        __delay_ms(2);
    }
}

void Lcd_Shift_Right(){
lcdcmd(0x01);
lcdcmd(0x0C);
}

void Lcd_Shift_Left(){
lcdcmd(0x01);
lcdcmd(0x08);
}

void lcd_num(unsigned int a){     //integer to be printed
    char buf[10];
    itoa(buf, a, 10);
    lcd_data_string(buf,5);
}




[yashrk]

Thank you for your input, guys. I set the configuration bit manually by reading datasheet well and it worked.
Thank you all ones again.