Author Topic: Please review my response  (Read 421 times)

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Offline Dadu@Topic starter

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Please review my response
« on: January 11, 2024, 03:19:26 pm »
I am not  sure if  this is right place to ask this question  here.  I recently had an interview for an embedded software developer position, and I asked about I2C communication. I explained it as a way for devices to exchange data using signals called SDA and clock. It works one-way at a time, either sending or receiving.

For writing:
- The master generates starts condition.
- It addresses the slave by sending the device's 7-bit address with a write bit (R/W = 0).
- once the slave acknowledges.
- Data is sent from the master to the slave.
- After each byte, the master waits for acknowledgment.
- Master generates stop conditions.

For reading:
- Similar start.
- Master sends the slave's address with a read bit (R/W = 1).
- Slave acknowledges.
- Data is sent from the slave to the master.
- Master acknowledges except for the last byte.
- Ends with a stop condition (P).

 Could someone review this explanation and suggest any improvements or corrections? I want to ensure I'm providing a relevant and accurate explanation during interview
 

Offline DavidAlfa

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Re: Please review my response
« Reply #1 on: January 11, 2024, 03:40:28 pm »
Pretty exact I'd say  :-+
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Offline dobsonr741

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Re: Please review my response
« Reply #2 on: January 11, 2024, 03:53:55 pm »
Overall good answer. Gave though one opportunity to the interviewer to drill into to your intro part, where you said “works one-way at a time”. Your answer is more accurate than this statement, where you pointed out the read is combinations of send/receive, and the acknowledgements are also change the direction of driving the line in the middle of the communication.

There are other things to say, to show off your knowledge of different areas: how is it fit into the family of serial interfaces, addressing, bit stretching, the electrical specs (pull-up, bidirectionality), and the future, like I3C.
 

Online newbrain

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Re: Please review my response
« Reply #3 on: January 11, 2024, 04:22:26 pm »
Pretty good overview.

A couple of small comments:
  • The master or slave do not really "wait" for an ACK, but rather expect them.
  • You could extend the description with the very common case of restarts, where a start condition is sent without a prior stop, usually when a specific register in the slave needs to be read: the master writes the register address, then restarts and reads the data.
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