Popcount math works fine in a verilog test bench, but module fails in real life

[farrell]

I'm making a primitive delta-sigma ADC with an FPGA. The input stage takes the output of a comparator, and shifts that bit into a register. The popcount (number of 1's) of the register is kept track of, and output from the input stage. The problem I am having is that my module seems to work perfectly in a verilog test bench, but in real life the popcount is wrong. It seems to increment or decrement as expected, but the value is wrong. I'm clocking my MachXO2 at 2.08MHz so I don't think it's a timing problem.

My module:

Code: [Select]

module delta_sigma(clock, comparator_output, comparator_feedback, adc_output);

input clock;
input comparator_output;
output reg comparator_feedback;
output reg [7:0] adc_output;

// input stage: LVDS comparator does the "delta" part, the "sigma" part is calc'd here
// 1. copy the comparator output to the feedback pin
// 2. shift the comparator output into a (2^n)-1 bit register
// 3. obtain popcount (number of 1's) of that register.

reg [14:0] feedback_waveform = 0; // 15 bits
reg [3:0] popcount = 0; // a number from 0-15

always @(posedge clock)
begin
comparator_feedback <= comparator_output;
feedback_waveform <= {comparator_output, feedback_waveform[14:1]}; // shift in the new bit
popcount <= popcount + comparator_output - feedback_waveform[0]; // add new MSB, subtract old LSB
adc_output <= ~popcount; // inverted because the LEDs on dev board are active low
end

endmodule
My test bench:

Code: [Select]

...
// generate inputs
always #1 clock = ~clock;
always #1 comparator_output = $random;

// check that popcount is correct
always @(posedge clock) begin
if(uut.popcount !=  uut.feedback_waveform[0] + ... + uut.feedback_waveform[14])
$display("Error: popcount is incorrect!");
end

// begin the sim
initial begin
clock = 0;
comparator_output = 0;

#1000;
$display("Simulation has ended.");
$finish;
end
     
endmodule
No errors print out, and spot checking confirms that popcount is accurate:


Real life results (using Lattice Reveal):


Any ideas?

-Farrell