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vrmlsdavhaxt.s32 r8,r9,q6,q2
Code: [Select]vrmlsdavhaxt.s32 r8,r9,q6,q2
Again, we have the initial V. This time it is followed by a Q, which specifies a saturating math operation,R (rounding) and D (doubling). We will look at what those options do in detail in the next section. MLAmeans this is a multiply-accumulate instruction. The D (dual) and H (return high half) are instructionspecific options and X is exchange. The data type (S32) is a signed 32-bit integer. The operation writesits results into Q2 and performs the multiply-accumulate on data in registers Q1 and Q0.Some instructions allow us to specify immediate values. It is not possible to encode an arbitrary 32-bitconstant in an opcode which is at most 32-bits wide. Many instructions permit a 12-bit immediatevalue to be encoded, arranged as an 8-bit value which can be rotated by an even number of placesto the desired position within a 32-bit word. Obviously, a floating-point constant cannot be encodedwithin an instruction. Helium instructions which include a constant will sometimes have a limitedrange of values (for example, most of the shifts described in this chapter allow a shift value of 1 to32 bits) and these will be noted in the instruction description.Syntax descriptions of Helium vector instructions will typically be followed by <v>. This indicates thata T (Then) or E (Else) may be present, associated with lane predication resulting from a VPT or VPSTinstruction, explained in Section 4.4. Some instructions may instead have <c> indicating a standardArm condition code (for example, GE greater than or equals etc.) The <.dt> field represents the datatype, as already explained.