Powering 5 V CMOS chip with 3.3 V (HD63C09)

[ale500]

Hello everyone,

I wanted to know if somebody did any test with such (or similar) chips. A 5 V CMOS chip powered only with 3.3 V. It is the C version, I'm really not expecting being able to reach the 3 MHz but maybe 1 Mhz ? The point of the test is to use a FPGA as glue logic and not go the route of bus level translators.

Thanks

[SeanB]

5V CMOS will mostly work ( slowly) at 3V3, though you might have issues. Can you bump up the voltage a little to 3V5, where the 5V part will be more likely to function at low speed.

[technix]

With undervolting comes underclocking but just like overclocking your computer, you need a bit of patience to find out the stable frequency at your lower voltage, which also depend on manufacturing detail variations.

Or you can add a voltage booster (MC34063 and friends) to get the 5V rail from your 3.3V rail. IO can be level shifted using 74HC245's.

[ale500]

I just wanted to connect it directly to an FPGA, without level shifters, thus I thought maybe I could undervoltage it a bit. The idea with 3.5 V occurred to me too, I thought when the limit is 3.6, than 3.6 may work better than 3.3...

Thanks!

[technix]

I just wanted to connect it directly to an FPGA, without level shifters, thus I thought maybe I could undervoltage it a bit. The idea with 3.5 V occurred to me too, I thought when the limit is 3.6, than 3.6 may work better than 3.3...

Thanks!

Since you are already working with FPGAs, and this HD63C09 is in fact a 6800 core, you can actually grab a 6800-compatible IP core and absorb this chip into your FPGA.

[ale500]

The 6309 is an "enhanced" 6809. I have a 6809 already (there are many, and also mine), but a 6309... not yet, that was one of my plans... it is a quite complicated architecture, I just wanted to compare it, a real processor

[edavid]

It's a dynamic logic design with TTL input buffers, so I really doubt it would work at 3.3V.

[ale500]

@edavid:

The Datasheet I have only says "The HD6309 is complete CMOS device and its power dissipation is extremely low".Complete with bad English.
It doesn't mention any TTL input buffers, what is a bit surprising, that they are not mentioned, I mean. The minimum clock frequency is mentioned as 500 kHz. What I don't know what it means in this context (a microprocessor) is a static vs a dynamic design.

The parts I have are HD63B09 and HD63C09E. I'll give the C part a go

[edavid]

The Datasheet I have only says "The HD6309 is complete CMOS device and its power dissipation is extremely low".Complete with bad English.
It doesn't mention any TTL input buffers, what is a bit surprising, that they are not mentioned, I mean.

Check the V_IH and V_IL specs.

The minimum clock frequency is mentioned as 500 kHz. What I don't know what it means in this context (a microprocessor) is a static vs a dynamic design.

Dynamic designs are a lot more picky about supply voltages.

[Bruce Abbott]

It doesn't mention any TTL input buffers

Logic input levels of 0.8V low and 2.0V high indicate TTL. That doesn't mean it has actual TTL inputs - just that they are compatible (like 74HCT). 

The minimum clock frequency is mentioned as 500 kHz. What I don't know what it means in this context (a microprocessor) is a static vs a dynamic design.

If it was static then it wouldn't have a lower frequency limit. However as it is a 'clone' of the 6809, it may be that Hitachi just copied the 6809's spec and it actually is static. Here's what Wikipedia says about the HD6309:-
 
"The 6309 is fabricated in CMOS technology, while the 6809 is an NMOS device. As a result, the 6309 requires less power to operate than the 6809. It is also a fully static device, which will not lose internal state information. This means it can be used with external DMA without needing refresh every 14 cycles as the 6809 does."

The parts I have are HD63B09 and HD63C09E. I'll give the C part a go

The HD63C09E requires external E and Q clock inputs. I'm sure you know that, but be aware that a lot of 'vintage' chips on the market have been remarked with incorrect codes. I got an HD63C09'E' off eBay that is actually the standard xtal oscillator version - easy to tell because pins 34 and 35 are outputs, not inputs!
 
 

[edavid]

The minimum clock frequency is mentioned as 500 kHz. What I don't know what it means in this context (a microprocessor) is a static vs a dynamic design.

If it was static then it wouldn't have a lower frequency limit. However as it is a 'clone' of the 6809, it may be that Hitachi just copied the 6809's spec and it actually is static.

Nope, the 6809 has a 100kHz lower limit vs. 500KHz for the HD6309.  I think Wikipedia is wrong.