precise high res pwm

[Q-Kernel]

The dsPIC33FJ32GS610 series have very powerful PWM's with a 1 nSec frequency resolution. See features below:

• Two Master Time Base modules
• Up to Nine PWM Generators with up to 18 Outputs
• Two PWM Outputs per PWM Generator
• Individual Time Base and Duty Cycle for each PWM Output
• Duty Cycle, Dead Time, Phase Shift and Frequency Resolution of 1.04 ns
• Independent Fault and Current-Limit Inputs for Eight PWM Outputs
• Redundant Output
• True Independent Output
• Center-Aligned PWM mode
• Output Override Control
• Chop mode (also known as Gated mode)
• Special Event Trigger
• Prescaler for Input Clock
• Dual Trigger from PWM to Analog-to-Digital Converter (ADC) per PWM Period
• PWMxL and PWMxH Output Pin Swapping
• Independent PWM Frequency, Duty Cycle and Phase Shift Changes
• Current Compensation
• Enhanced Leading-Edge Blanking (LEB) Functionality
• PWM Capture Functionality

They are mostly used for DC/DC and AC/DC Inverters, PFC and  lighting. Very cheap too

[westfw]

rather thinking of programming a microcontroller pwm output, but those I found have 16 bits max.

Time to look at some of the new 32bit processor chips.  The TI Tiva (ARM CM4) chip used on the $12 "Tiva Launchpad" board has 32 and 64 bit general purpose timers (with OC-based PWM capability), even though its fancy "PWM controller" seems to be based on a 16bit counter.

[Andreas]

Hello,

when reading 1ns resolution or 32 Bit processor I think always "PLL".
The question is: do you really want to use a PLL with jitter and phase noise nearly in the percent range for a precision PWM?
For a SMPS this may be a nice feature since you get a spread spectrum of your EMI noise.
But for a calibrator where you have carefully select your PWM output frequency according to the NPLC setting of your DVM to get maximum normal mode suppression?

With best regards

Andreas

[acbern]

sure, 10ns are 1ppm, but at 16bit for the first stage and 100hz output the counter input frequency is in the range of 6mhz, or 160ns, so getting jitter to well below 10ns should not be a problem. and  analog switches I would not use, would just use a slow filter, no need for fast settling.
similar to how datron does it in their 4808. and the btw used 13 and 13 bit pwms.
that being said, it is cerainly not simple, agreed.

[Andreas]

Hello,

no analog switch to scale down a precise reference voltage with your PWM?

The interesting question is: why do they use 13 + 13 bits PWM at Datron.
(They also could use 16 + 10 Bits)

With best regards

Andreas

[acbern]

actually i wanted to use the tc1426 as the switch due to its low on-resistance. this would then directly go into the filter. the max 4052 has a very low charge injection, 10pc only. maybe the max4052 would be a good candidate too, not sure it is the better choice, what do you think?
as far as datron is concerned, one of their complications certainly was that they had to generate the digital pwm stage by conventional 74-logic. quite an effort back then, but I can only guess. i would tend to keep the lsb impact low (hence 16 bits of msb) in order to be able to forget the influence of resistor mixer drift (temp and long term). 13 bits means about 1,25 mv for the lsb.
linearity is not so important for me btw, I just want to set a voltage, what the exact digital value is of secondary importance. impornant for me is long term and temperature drift.

[Rerouter]

so what your actually after is a high resolution low drift system (precision implies you want each step to be as close to actual as possible)

[acbern]

if thats your interpretation of precision then thats right. i would not necessarily concurr, because repeatability and resolution should be below 1ppm. if the inl is 5ppm I do not care. if the dnl is 2 ppm I do, because then there are missing voltage steps.

[Andreas]

Hello,

I do not think that a high current mosfet driver is a good choice for precision PWM.
But I did not try this.

5 ppm INL is also not easy to achieve. On the first try I got 65uV / 5V = 13 ppm INL with the MAX4053A.
With some trimming the INL could be enhanced to 3-4 ppm.

DNL should not be a issue with PWM.

Long term + temperature drift will depend mainly on the reference voltage which is used.

With best regards

Andreas

[tszaboo]

You can increase effective resolution of a MCU PWM using dithering - e.g. change the LSbit every nth PWM cycle.

Sorry Mike, but that is not true. If you dither something, you will get a small ripple on the output, just as you said it. If you make a filter to filter out that ripple, mathematically, you end up with a system which is equivalent with a higher resolution, slower pwm. So there is no real advantage, only if you are hardware (register size) limited somehow.
The only real way to increase a pwm resolution is throw more hardware at it. This means plls, multiple clock-shifted registers AND gated, and so on. There is no easy way.