Once calibrated, with internal shunt the variation remains at an acceptable noise level (40count -> 11uV).
The name "antialising" is actually misleading, better to call "OPA protector against ADC charge kickback". Microchip's adc's are not so aggressive like TI, but still there is switching capacitor load present.
Although in the case of this test it is not necessary, the antialiasing filter exists (R41+C32), but I chose to buffer with the opamp for the CH0 input.
I can add one more filter to the opamp output, but I don't believe it makes much difference.
Another possible issue - reference driver mcp6002 may oscillate.
The Vref is clean, as it should.
The MCP6002 is on a voltage follower setup, as indicated in Figure 7-1 of the datasheet (page 77).
Maybe you have to continue to bet on the quality of the signal that arrives at the ADC...
The problem is that with an external shunt and after making 60 averages, I still have a noise level of 50uVpp. If it was just 10uVpp it was already acceptable for my application.
Why would you expect the offset to be 0? Did you calibrate the ADC? While the drift spec for offset on these Microchip parts is great, the initial offset is something like +- a few thousand counts. If I did the math right, the datasheet claims +- 900uV offset, which would be +-12500 counts or so at 24 bits. I don't see a problem with your measurement given that, and the 39 count variation seems very good also. I've used MCP3914 before and the analog specs are impressive, although the amount of silicon bugs and various garbage requiring ugly workarounds is less than ideal.
Hi.
I think 900uV doesn't match that many ADC counts.
I don't know which Vref you used to do the math, but in my case the Vref is 2.5V.
(900uV*2^23)/2.5 = ~3020count
This is generally a really bad idea, keep one and only solid ground plane, and low-pass filter the AVDD for the chip if you want to improve PSRR (which honestly might not be needed, you already get good PSRR as-is, so if your 3V3 is quiet enough as-is you might be better without).
It is good practice to separate the powers.
All the digital part on one side and the analog part on the other.
I also separated the communication lines with 100R resistors to reduce the current peaks that could affect the measurements with the internal stability of the ADC.
These are just some practices that I'm used to in other projects, but I don't think they have such a negative impact as you suggest.
Deep down this is also corroborated on pages 79/80 of the datasheet.
As much as possible I tried to follow the directions as much as possible...
Thanks for the answers.
I'll go ahead with some more tests and I'll update here.