STM8: Timer2 channel compare output pin, setting initial value, then toggle

[rhodges]

I am planning to use an STM8 Timer2 channel as an output. Here is the basic idea:

1. Wait some period of time.
2. Set the channel output pin high.
3. Read the timer count, add 400, and write to the compare register.
4. When the count and compare match (400 ticks) later, the output pin toggles automatically.
5. Catch the interrupt and set a new compare value.

Bits OC1M in TIM2_CCMR1 set the behavior of the output pin.
Using 101 is "Force active level - OC1REF is forced high". That takes care of (2) above.
But I want to use 011 "Toggle - OC1REF toggles when TIM2_CNT = TIM2_CCR1" so that the pin will toggle automatically.

My datasheet "DocID14587 Rev 14" does not seem to address this.

Will this work?
1. Set OC1M in TIM2_CCMR1 to 101 to set the output pin to high. Then, immediately after:
2. Set OC1M in TIM2_CCMR1 to 011 to toggle the pin (to low) when the count matches (400 ticks later).

To ask this a different way, when I write 011 for "toggle", does it leave the current pin value unchanged? (Until the count and compare match.)

I am suspicious about *assuming* any behavior that is not well documented.

For the curious, this is serial bit-banging and I would like the timer channel to handle the pin timing, and avoid jitter from interrupt latency.

Thanks!

[rhodges]

Update:

The timers and capture/compare channels appear to be very close between STM8 and STM32. So I looked at RM0360 for STM32F030 to see if there is anything useful there. I did not find anything new about OC1REF. But there was a code sample (A.8.7) for setting up a channel for output compare with toggle. This code did not do anything to clear OC1REF before setting the 011 bits for toggle.

I went back to the STM8 manual, looking for every reference to OC1REF. There is no mention about clearing it before using toggle mode (say, from an unknown state.) The relevant timing diagrams appear to show that OC1REF just magically starts in the clear state.

Sigh. I would really like to look at the logic inside the "Output Mode Controller" that creates OC1REF. I will keep looking.