I do understand that 0xA0 after the address should put the QSPI flash IC into continuous mode, but how do I confirm that when there no documentation and wasting money on PCB
For example:
I can only assume that memory IC vendors think that stuff is standard knowledge to most of its clients that buy millions of these IC's but It makes it dam frustrating when trying to confirm vague claims from third party vendors in their SDK's when you're only buying a handful
. I did look on the raspberry pi forum about this issue first but most posts including the one posted here were unanswered, not a good sign. So I came here.
But most QSPI flash devices would support it, nobody would want to market incompatible product.
Again, this comes down to the documentation issue of not documenting a feature or assuming everyone knows about it. Is there a JEDEC type standard for QSPI Flash memory, they all seem to follow the same command values?
... A few hours later ...
Ok, I found JEDEC standards that relate to xSPI Interface, JEDEC216, and JEDEC251, but no help there. Then ... (Copilot to the rescue)
Found this in a Microchip doc :
https://onlinedocs.microchip.com/oxy/GUID-C0DEC68F-9589-43E1-B26B-4C3E38933283-en-US-1/GUID-CF766800-7EB7-4611-B926-21177855F899.html#GUID-CF766800-7EB7-4611-B926-21177855F899__ID-00000E88, It shows details about mode bits and what code enter/exit SPI 0-4-4 mode (XIP). Again, it's third-party documentation
, but better than nothing.
Thanks for your help.