Electronics > Microcontrollers

rp2040 MCU pll derived clocks jitter?

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iMo:
Hi, did by chance an experienced enthusiast here ever measured the jitter of the clocks created by its pll?
For example the original pico board or clones like waveshare's pico-zero etc?
Thanks.

nctnico:
Not for this MCU particulary but expect quite a bit of jitter as many of these PLLs seems to be actually DPLLs which use chained delay elements instead of a VCO.

dobsonr741:
@iMo how did you come to the conclusion the clock jitters?

iMo:

--- Quote from: dobsonr741 on April 16, 2024, 12:02:01 am ---@iMo how did you come to the conclusion the clock jitters?

--- End quote ---

I did not come to the conclusion the clock jitters, I've been asking here on some measurement data availability, if any.

Kleinstein:

--- Quote from: dobsonr741 on April 16, 2024, 12:02:01 am ---@iMo how did you come to the conclusion the clock jitters?

--- End quote ---
There is not question that there is jitter on the clock. There is always some jitter, the question is only how much. Jitter or phase noise is not so simple to describe, as one often has more than simple white phase noise.

I am afraid there could be quite a lot of jitter, as the RP2040 modules have a switched mode regulator and thus likely some ripple on the supply, that will translate to FM modulation of the clock.
The other point is that the chip is more made for low power than a super stable clock.

There is a project for a frequency counter (AFAIR also a version with extra time interpolator) build around the RP2040 - this may give some hints.

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