Author Topic: SAMC ARM has the same drawback as legacy AVR  (Read 1591 times)

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Offline techman-001

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Re: SAMC ARM has the same drawback as legacy AVR
« Reply #50 on: August 12, 2019, 09:35:46 pm »
Not from me ...  is my STM32 bias showing I wonder ?  :box:
I personally not a fan of all those timers being totally different.

If you look at the same STM32F051:
TIM1 - Advanced-control timers
TIM2 and TIM3 - General-purpose timers
TIM14 - General-purpose timer (different to TIM2 and TIM3)
TIM15/16/17 - General-purpose timers (again different to all others and even between themselves)
TIM6/TIM7 - Basic timer

I'm not complaining. I've seen so many microcontrollers, that I just roll with whatever I get at this point. But it would be nice to have some universality.

I would argue those timers even the 32bitter are the same on logic level, while ST just functionally reduced them as to portray them as different. Bad marketing move id say. How much chip floorplan do they save between say a T15 and T16/T17 for instance.

Most area on a eg STM32F103V seams to be memory while peripherals are tiny.

The STM32F103 was ST's first 32 bit ARM, released in 2007 and a lot has changed in 12 years.

For a STM32F051:

       22 registers
      127 bitfields

      20 registers
     107 bitfields

      20 registers
     107 bitfields

      12 registers
      27 bitfields

       8 registers
      13 bitfields

      18 registers
      78 bitfields

      16 registers
      57 bitfields

      16 registers
      57 bitfields

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