Searching modern MCU with a (classic) 8bit I/O bus

[DC1MC]

Hello, for a project that needs to interface some vintage chips and a bit of SRAM I need a reasonable modern MCU that has an 8bit parallel bus, practically a Z80 on steroids .
Sadly the Z80 successors are not doing very well and I was wondering if there is some device cheap and readily available that has such a bus, of course I can implement some crappy bit-banging re-purposed GPIOs, but  would prefer something that has this bus memory mapped.
Any suggestion is well appreciated.

 Cheers,
 DC1MC

[JPortici]

Although i have never used the parallel bus aside from communicating with displays, you can find it on almost any MCU you can think of with more than 40pins, 8 16 or 32 bit

[newbrain]

As JPortici says (ninjaed...), many MCUs include an external memory controller.

First to come to mind: LPC43xx from NXP (144 pin and above) and STM32F1, F4 and F7 (possibly others).
LPCs are also, IIRC, able to boot from external memory.

For STM32Fx, search from FMC or FSMC in the selection charts.

EtA: and PSoC, of course, very useful with old stuff, given it can run at 5V!

[digsys]

As mentioned, most (all?) will do that. My current favourite series , which is C8051 based - similar to the Z80 is - https://www.silabs.com/products/mcu/8-bit
Not only have extended addressing, but some have IRQ triggers on the IO - a very handy feature. Plus heaps of other niceties !

[JPortici]

Yes, i haven't mentioned any particular MCU because i'm not sure which one will map the external bus on memory (possibly all? surely STM32 with FSMC and PIC32. In those once you set up the peripheral you should be able to declare variables in the external bus space and perform read/writes as if they were in the internal memory, but i have never had to do it myself)

[iMo]

I've done it with stm32 (stm32F103ZE, stm32F407ZE, wired to 256k x 16 10ns SRAM) and it works. You get 4 linear memory segments with 256MB space in each.

The access to the external memory space is much slower than into the internal memory, however. Also it works best with 16bit data bus, but 8bit is possible as well, imo.

STM32 can execute (run the binary) off the external memory wired via FSMC (proven as well).

PIC32MX cannot execute off the external memory.
PIC32MZ - not sure it can execute off the external memory.

Long time back I messed with Dallas (Maxim) DS80Cxxx (8051, 1 clock, 33MHz) and based on the compiler (Keil or IAR) you may address megabytes of the external space (not linear, segmented, complicated).

[andersm]

PIC32MX cannot execute off the external memory.
PIC32MZ - not sure it can execute off the external memory.

There's no PIC32MX with an external bus, there's only a parallel memory port (PMP). The PIC32MZ shouldn't have any problems, though performance may suffer.

[iMo]

The PIC32MZ shouldn't have any problems, though performance may suffer.

I've got this gadget
https://majenko.co.uk/product/chipkit-pro-mz so I will try soon.. Never seen a practical example PIC32MZ can execute off the external ram. Btw, there is a PIC32MZ version with xxMB of sdram piggy-backed on the MZ chip (a sandwich). MChip mostly claims it is for data buffering only.

[iMo]

..The access to the external memory space is much slower than into the internal memory, however. Also it works best with 16bit data bus, but 8bit is possible as well, imo.
STM32 can execute (run the binary) off the external memory wired via FSMC (proven as well)...

FYI - STM32 - when the external memory space is used for Heap, the performance with memory intensive benchmark I did (bubble sort, quick sort) is ~3x slower than with internal sram.
When running binary off the external sram, the performance is 8-10x slower.
All done with 10ns sram, fastest FSMC settings, 16bit wide data bus.
You may extrapolate how will be the performance of 8bit peripherals wired to such an 8bit bus.

[TassiloH]

Previous posters have already mentioned the STM32Fxxx ARM controllers and its FMC/FSMC peripheral. Just one caveat: At least for the STM32F4xxx, the memory controller does not provide full flexibility regarding the data setup or hold times (I forgot which one), when writing to an external chip one of these times is basically zero which some external devices might not like.

[iMo]

With f103 f407 you can set both times none zero.
Btw, with retro/vintage peripherals (ie. 8255 6821, and others) you have to set the FSMC speed so slow that any benchmarks above are not applicable
Mind the clock with the slowest stm32f103 is 13ns and F407 is 6ns. Old 8bit peripherals were with 100-500ns access times..
PS: the FSMC bus with stm32 is fully supported with 144pin chip variants only..

[Dielectric]

The Cypress FX2LP has a "GPIF" that is basically a configurable memory interface, complete with chip enables, address and data lines, etc.  8051DP inside, and apparently people are using it with SDCC these days instead of the very old and limited Keil compiler in the official SDK.  You can ignore the USB subsytem entirely if you don't need it.

All of the cheapo logic analyzers use the GPIF as the capture inputs, so for a little bit of money you could prototype with one of those.

[TassiloH]

With f103 f407 you can set both times none zero.

Oops, sorry, my fault, my memory served me wrong. I looked up the old project where this was an issue, and the problem was with the timing of address valid and write signals using a multiplexed bus (no delay between them, whereas an 8051 as a few hundred ns between deasserting ALE and asserting WR).

[DC1MC]

Thanks all for the suggestions so far, more are welcome  .

Some clarifications:
 - Indeed the peripherals are old, so I need a MCU where the bus speed/timing can be set, this is of the utmost importance !!!
 - As I'm using the external RAM for data storage there is no problem if the access speed is very low compared with the internal memory.
 - Other peripheral hooked on the bus are also very slow, as someone said, in the 500us range.

 If any of the above mentioned MCUs fit the bill, please confirm, I already know and use the FX2, but making a bus from his endpoint RAM and GPIF state machine is a pain.

 Many thanks,
 DC1MC

[iMo]

- Other peripheral hooked on the bus are also very slow, as someone said, in the 500us range.

The stm32xxxx in 144pin (full FSMC bus supported) can do that, afaik, not sure with your 500us (do you really mean microseconds??, core rope memory??) as the number of waitstates in the FSMC bus settings is limited in size

You may review the stm32 refman on this, the external memory space is fully transparent to the code, the external bus architecture seems to be 1:1 with typical peripherals (8b/16b/sram), it does 32bit access as well of course (in two steps automatically). To me it looked fully transparent. Not tested with 8080/6800 like devices.

You have to double-check, however 

[westfw]

The larger AVR chips have an external memory bus.  You can get 512 kbyte add on cards for your Arduino mega...

[Bruce Abbott]

Hello, for a project that needs to interface some vintage chips and a bit of SRAM I need a reasonable modern MCU that has an 8bit parallel bus, practically a Z80 on steroids .

What is the project and why does it need external SRAM?

[DC1MC]

I think it will be useful and bring more good ideas if I clarify a bit more the scope of my project, so here it is:

 - I don't need hook actual SRAM as program or data storage memory, but I want an EMI/EMIF or whatever the marketing is calling now these external memory interfaces to be as close as possible (some glue logic may be needed) to those 6800/Z80 interfaces, practically address bus, bidirectional data bus and some RD/-WR or similar signals. A kind of request/ready signal will also be appreciated, the things I want to drive are really slow.
I wish to avoid any kind of demultiplexing or the need to add too much glue logic for the proper implementation.

- Why do  I need such a bus: I have a lot of vintage and without modern equivalent devices that are designed for such a bus, and while of course I can do bit banging, reprogram the GPIO pins direction and other RPi/Arduino pfuscherai , I find these solutions disgusting and wish to avoid them if possible.

- Yes, yes, but what EXACTLY obsolete chips are these, so I can tell you that is all wrong, you don't do this you do it otherwise, "...user asks how to do X, but he actually needs to do Y and he (wrongly) believes he need to do X to get Y,  ...", we've al seen the lame xkcwhatever lame cartoon... 

- Still, what are you trying to accomplish, tell us  ?
OK, here it is, I want to rape, plunder and destroy some wonderful vintage (but dead) TE and replace the anemic digital part with a bit less obsolete equivalent, getting rid of some unobtanium stuff in the process.
This is one of the main applications that I have in mind along others.

So after reading this you can actually recommend a modern MCU that fits the bill and is still average human solderable (no BGA or ultrafine flat pack), please let me know. Some of the proposed MCUs do look good, but more options the merrier .

  Thanks and cheers,
  DC1MC

 

[DC1MC]

Update: after mulling trough the options it seems that ST Micro series with FMC/FSMC is the answer for my quest.
I consider ordering a ST NUCLEO-H743ZI that seems to have the necessary MCU on it and the signals for the bus that I want to implement.

Some more questions for the experienced STM guys:

 - What is the best C development environment, eventually one integrated, or that can use, the headers generated by the configuration tool ?
 - What little OS do you recommend, ChibiOS, Azure, something else ?
- Is there a tutorial/AN focusing on 8080/6800 bus implementation, so far I've only seen some LCD panel examples, a bit thin information ?
 - I've seen the above mentioned boards at real inflated prices at  -bay and friends, but Digikey has them in stock for a good price, does anybody in Germany wants to make a shared order to cover for the Digikey shipping costs ?

 Cheers,
 DC1MC
 

[iMo]

There are $12 (postage incl.) boards with stm32F103ZET or F407ZET (144pins chip packages) available, so when you've got no experience with these, do start rather small.. (EDIT: you would need a $2 ST_Link programmer as well). When all works fine then you may switch to a stm32H7, sure

These stm32 (and all ARM/MIPS based MCUs) know the "memory access"  only, so all your vintage peripherals will be "memory mapped". Consider this when thinking on actual wiring. (EDIT: it means when we talk about working with an external sram memory, or 8255 PIO, it is the same story..)

Important: in case your vintage parts are 5V then you have to double-check whether the MCU's buses are fully "5V tolerant" otherwise you need voltage level translators. All modern MCU's are 3.3V I/O with some pins "5V tolerant".
EDIT: 5V tolerance is about MCU's "input", the MCU's output signalling will stay 0/3.3V (EDIT: double-check whether your vintage peripherals are happy with log1=3.3V at their inputs, it may work fine).

Development tools: that would be a pretty wide topic with a lot of posts, unless you tell us what is your actual experience with sw development in that area..

[T3sl4co1l]

If you are only replacing the CPU inside a device without bus mastering, then most any MCU will do.  Drive bus signals from GPIOs -- not nearly as elegant as a single OUT or MOV instruction, sadly, but when all timing is yours, you get to set the pace!

If you do have to deal with bus mastering, and WAITs and all that, you may be able to hack in (predict?) delays specific to certain devices.  That's more or less how this worked:



Which still didn't work out all that well in the end; it could probably be made much better, but this clearly shows the time-value tradeoff to such hacks.

Else, you may find it's far more cost effective (in terms of dev time and hair pulled, but probably parts cost or dev kits, too) to use a small FPGA as a bus controller.  How you organize the interface side is up to you; it could be a buffered queue of inputs and outputs to be handled by an MCU, or a shared memory space (accessible at the MCU's leisure), or little more than the combinatorial logic necessary to hold up the bus while the MCU collects its thoughts (so to speak).  Which could be a conventional GPIO interface from the MCU, or one of those FSMC things (in which case the FPGA simply extends the bus signals and timing as needed).

Tim

[iMo]

Else, you may find it's far more cost effective (in terms of dev time and hair pulled, but probably parts cost or dev kits, too) to use a small FPGA as a bus controller.

He could go with much sexier roadmap - a full FPGA road, the cheapest variant - for example - an Spartan6 LX6 or LX15 ($15 boards) with MicroBlaze MCU (32bit MCU, similar to MIPS, 4x32bit gpios, fully integrated C based SDK, all in one in ISE 14.7, yes - EOL, but still works great on Win7).

Or, $50 Artix7-35 boards, Vivado, with Microblaze CPU, or any 8/16bitters from last century (OpenCores are full of those 8/16bitter vhdl/verilog sources). Or NIOS with ALtera, etc.

To be really "retro/vintage" he may go with PDP-8 (LX6 is ok) or PDP-11/70 (Artix7-35 best, optional FPU fits too, afaik).

Still mind the older vintage parts are usually 5Volt devices.

[DC1MC]

@imo: Why should I start low, the NUCLEO-H743ZI is 21USD at Digikey, the extra power compared with the Fxxx... series is significant and the extra cost is not.
Also about the bus levels, there will be no direct connection joy and happiness, sadly  I don't have anything, from the things  want to drive, that is even close to 3V3, the lowest is 5V and I have weird levels as -15V, +15V, +7V and other oddities  imagined by our smart MOS/BIMOS/ECL and other technologies ancestors  .
So one of the first important tasks is to have an universal level translator "shield", a bit of an issue especially for the bidirectional part, but challenge accepted and suggestions welcome  -, opamps included.
The fact that all will be memory mapped, if fills me of joy  .

@Teslacoil - so far, the DMA issue is for the second stage of development, now I have some nice ancient multimeters that don't do DMA AFAIK, it will be my first victim.
I would love to have a Z80/6800 like front-end  implemented in a small Lattice FPGA or XILINX CPLD, with the whole control signals set as well, the MCU interface could be whatever or even SPI    at the speeds involved,  sadly I don't know shit about digital design with FPGA and is a bit late to learn, maybe sometimes, somebody, will do such a shield with the proper logic levels to just stick it instead of the CPU, looking at the crap that gets funded on Kickstarter will not be such a bad idea.

In the end still wating for your best IDE/Compiler/Pin matrix programmer combo for the STM and suggestions about some 3v3 input to positive or negative logic level shifters.

 Cheers,
 DC1MC

[T3sl4co1l]

He could go with much sexier roadmap - a full FPGA road, the cheapest variant - for example - an Spartan6 XL6 or LX15 ($15 boards) with MicroBlaze MCU (32bit MCU, similar to MIPS, 4x32bit gpios, fully integrated C based SDK, all in one in ISE 14.7, yes-EOL but still works great).

Yeah, you get a shitton more functionality (>5k gates?), enough to build a softcore -- or just get one with a hardcore alongside -- for just a few bucks more in FPGAland.

Bonus, even the dumbest softcores are usually capable of running stupidly faster than their original namesakes.  I recall an array of 8051s (as a flow computer I think) running at 170MHz, in one example.

Troubles notwithstanding in both Altera and Xilinx tools, of course.  Maybe you'd find a familiar MCU easier to work with; but then, you do need to manage the bus between them, and maybe that's easier with an integrated core.

But hey, this is a nontrivial problem, it should be no surprise that there is no slam-dunk ready-made solution for it.

Still mind the older vintage parts are 5Volt.

Oh yeah, good point.  74LS TTL might be okay on a 3.3V platform, but anything with HC CMOS at 5V will blow that away.  Maybe not literally, if it's got "5V tolerant" inputs -- but the equipment better have TTL level receivers to read those 3.3V outputs, else you're going to have a ton of fun resolving marginal logic-high levels over temperature and aging!

If you need true 5V compatibility, that may end up as annoying as the interface itself.  Not because of complexity but just because you need thirty of the stupid things.

[iMo]

I've seen somewhere some "newer" MCUs for automotive, designed for 5Volt. I cannot remember which one. One needs to google.. Freescale?? Renesas??

Edit:
https://www.nxp.com/products/processors-and-microcontrollers/arm-based-processors-and-mcus/kinetis-cortex-m-mcus/e-series5v-robustm0-plus-m4:KINETIS_E_SERIES

PS: no idea whether they posses an "FSMC-like" bus..