Debugging in real time has not been possible since "bond-out" CPUs went out of fashion, in the 1990s.
I used to have a Japanese ICE (in circuit emulator) for the Z180 (cost about £10k) which had a trace buffer of a few k words, so you could trace a whole ISR in real time; the CPU knew nothing about it.
We also had an American-made ICE for the 80x286, which was a full length doubled-up ISA card in a 25MHz Compaq PC, which did something similar. Cost well into 4 digits. Wonderful for tracing code around dongles (which often used timers to detect single step debugging attempts)

Faster CPUs put an end to all this. Tektronix tried for a while to make logic analyser features which did a similar job, with code disassembly, symbol listing, etc. I stopped following that a long while ago. On-chip caches killed that off.
None of these debuggers we are talking about here are anywhere near real time, because they use a hardware address match (a feature of the CPU) and then extract data via a serial interface running at some MHz (JTAG or SWD; not sure of the difference, if any). Some debuggers can do a "trace" by setting a new breakpoint to the next instruction and running to it, but this isn't real time; it is something like 100x or 1000x slower.
The main feature, arguably, of the expensive Seggers (not the EDU) is that they can dynamically patch jump instructions into the CPU FLASH and use this to deliver an unlimited number of "hardware" breakpoints. The 32F417 I am using has on chip support for 5, which is normally OK but if you exceed it, the debugger blows up and you have to reload the code and start again.