SPI basics

[0xdeadbeef]

The SDO of a SPI slave must only tristate while the device is not selected through CS. This is how the SPI bus is working - it has nothing to do with daisy chaining.
You suppose that an SPI device monitors each bit that is shiifted in. This is usually not the case - it certainly isn't for a device that supports daisy chaining. Indeed as I wrote somewhere above: the slave copies its internal data (that is supposed to be transmitted to he master) to the shift register when the CS is pulled low. While the CS is active, the shift register is merely a shift register. Only when the CS is released, the slave will copy the data from the shift register to its input/command register.