SPI Flash 4K Sector Erase

[d0lphin]

Hey guys,

This might be a little niche, but does anyone know if it's "normal" for some SPI NOR flash chips to just not support everything in the datasheet?

I'm working with a bunch of Winbond W25Q256FV chips and while most things work according to the datasheet, I can't get 4k sector erase (command 20h) to ever work. Just like with 32k and 64k block erase (0x52 and 0xD8), executing 0x20 causes the BUSY bit to assert and then after it clears WEL also clears. But while with 32K block erase (52h) and 64K block erase (D8h) the contents of the block are (upon subsequent read) reset to 0xFF, with 4K sector erase (20h) the old contents of the sector remain in place.

Any clues?

I don't know if it matters, but these are specifically W25Q256FVEQ chips.

[nctnico]

You might need to reset the write protection bits first. Dump the content of the status register and check the lock bits.

What address are you loading into the chip to erase the sectors? For 4k blocks you'll need to use 4 bytes addresses with command 20 (hex). Your device is 32MB and the maximum range of command 20 is 16MB. Recently I used the W25Q128 and 4k block erase works just fine.

Edit: it looks like the W25Q256FV doesn't have a seperate command number 21 but can be used in 4 byte address mode nevertheless.

[AVI-crak]

I'm working with a bunch of Winbond W25Q256FV chips

Page 10 of the main documentation contains a map of sectors with 4K access, and it is quite tricky.
For starters, the W25Q256FV chip has only 16 tiny 4K blocks. To access them, you must first include the address of the first 4K block. It may be at the very beginning, or it may be 0x01FF0000h. I do not recommend doing such nonsense, enabling or disabling the address is possible only after the chip is completely erased.
In the case of installed protection, it is impossible to disable the address.
You will have a chip in your hands that cannot be written on an external programmer.

[nctnico]

I'm working with a bunch of Winbond W25Q256FV chips

Page 10 of the main documentation contains a map of sectors with 4K access, and it is quite tricky.
For starters, the W25Q256FV chip has only 16 tiny 4K blocks.

No. Just read the description carefully, the entire flash can be erased in 4k blocks. The description says the chip has 8192 sectors (=4k blocks) which adds up to the entire 32MB.

Edit: note that the erase command for a 4k sector does not use the sector number to select the sector but the actual memory address of the sector. So erasing sector 2 (=third sector in the flash), you'd need to use 0x2000 as the address for the sector erase command.

It likely is a good time for the OP to look at what is happening on the SPI interface.

[wek]

> with 4K sector erase (20h) the old contents of the sector remain in place

How do you know (i.e. don't you have problem in the method which reads/checks content of the sFLASH)?

Also, don't you erase a different part of the sFLASH than you thought, by mistake? (you could check this by programming all sFLASH to some non-FF pattern, perform the erase, and then check where was the pattern erased).

JW

[d0lphin]

> note that the erase command for a 4k sector does not use the sector number to select the sector but the actual memory address of the sector.

The erase procedure for 4K and 32K blocks seems to be the same. The starting address of the sector/block is given (though it seems via testing that any address can be sent and the entirety of the containing 4k/32k/64k block is erased, i.e. the latter bits are zeroed internally, which makes sense since it just maps the address to the corresponding sector/block to assert the lines on the internal address bus).

> How do you know (i.e. don't you have problem in the method which reads/checks content of the sFLASH)?

Because I use the same routine to check the contents of the memory at any address and after a 32k or 64k flash everything is fine but after a 4k sector flash the "erased" sector does not contain 0xFF. I have also verified the contents of the chip with an external programmer from my PC and confirmed that 4k erase fails but 32k/64k/chip erase succeeds.

> You might need to reset the write protection bits first. Dump the content of the status register and check the lock bits.

They are clear. I'm trying on new chips and old chips. I can write the entire 32MB range after erasing the chip or write any 4K sector with arbitrary data after erasing the 32k block instead of the 4k sector.

> It likely is a good time for the OP to look at what is happening on the SPI interface.

I have previously verified the operations line up with my scope. I've compared the on-the-wire bits and timing from a 4k erase vs that of a 32k or 64k erase and everything seems to line up.

I also made sure to use a lower address so that the MSB address bit is always zero to make sure it's not some 3-byte vs 4-byte addressing oddity, and tried in both 3-byte and 4-byte addressing mode.

The erase does *something* since as mentioned, performing any erase variant (including 4k sector erase) the BUSY bit is asserted for some time (matching the documented durations of sector/32k block/64k block/chip erase times in the datasheet) and after BUSY is de-asserted the WEL is back to zero.

[nctnico]

What do the SPI bus signals look like (clock + data)? Can you share a screendump? What speed are you running the SPI bus at?