STM32 DMA PWM two channels

[ali_asadzadeh]

It sounds  great!

[DavidAlfa]

I got it working in Burst mode. Hence, now it's doing stereo with the same resources.

In this mode, when the timer triggers the DMA, it does it multiple times, and uses a virtual register (DMAR) that will redirect the data to register offset set in DCR.
In this case , burst=2, offset=CCR1, so it will update 2 channels at once (CCR1 + CCR2).
Only 3 lines of code, however getting it configured correctly took a few tries

Code: [Select]

/* Configure timer in DMA burst mode
*
*  Timer start offset = CCR1
*  DMA trigger source = Timer Update
*  DMA source = PCMdata[]
*  Burst count = 2
*/ Total data length = PCMsize (it's a #define here)

HAL_TIM_DMABurst_MultiWriteStart(&htim1, TIM_DMABASE_CCR1, TIM_DMA_UPDATE, (uint32_t*)&PCMdata[0], TIM_DMABURSTLENGTH_2TRANSFERS, PCMsize);


// Start PWM channels

HAL_TIM_PWM_Start(&htim1, TIM_CHANNEL_1);
HAL_TIM_PWM_Start(&htim1, TIM_CHANNEL_2);
But I have bad news: STM32 F0 and F1 series don't have it... only single transfer.
It seems it does! AN4776 said that... but it's wrong.

[DavidAlfa]

I finally added WAV parsing, it can recognize and play 16/32/48KHz mono/stereo 8-bit WAV files.
I uploaded the sample project here:

https://github.com/deividAlfa/STM32F411-Black-pill-USB-wav-player

[ali_asadzadeh]

Thanks for sharing

[ozcar]

I got it working in Burst mode. Hence, now it's doing stereo with the same resources.

In this mode, when the timer triggers the DMA, it does it multiple times, and uses a virtual register (DMAR) that will redirect the data to register offset set in DCR.
In this case , burst=2, offset=CCR1, so it will update 2 channels at once (CCR1 + CCR2).
Only 3 lines of code, however getting it configured correctly took a few tries

...


But I have bad news: STM32 F0 and F1 series don't have it... only single transfer.

Don't have burst mode? I've not done much with F1s, and nothing at all with an F0, but from a quick peek at the reference manuals, burst mode DMA is supported for some of the timers.

[DavidAlfa]

Don't have burst mode? I've not done much with F1s, and nothing at all with an F0, but from a quick peek at the reference manuals, burst mode DMA is supported for some of the timers.

You're right!

I checked both STM32F0xx and STM32F10x series reference manuals.
TIM1 has DMAR/DCR registers, clearly stating the DMA burst capabilities.

What I posted was based on the AN4776 application note, which might refer to other F1 series.
Or just BS to trick you into buying a more expensive part?

In STM32 microcontroller families, there are two DMA peripheral variants:
• The DMA burst transfer feature supported only by the STM32F2 products DMA
peripheral variant where the DMA peripheral can transfer a configurable number of
data elements next to a single data transfer trigger.
• In another variant, like the one on the STM32F1 products, the DMA peripheral variant
supports only single transfers; this means that only one data element is transferred
next to a data transfer trigger.