STM32 Roadmap?

[Debugging]

More information related to the title of this topic:

https://live.vhall.com/v3/special/detail?id=744067034

You can view the ST Event in China last week, There is English translation for the key note, click on "English" after selecting the video
Unfortunately, no PDF slides.(yet?)

ST seems to to a better marketing job with much more detail for the folks in China than for those elsewhere. Perhaps there are more product design house customers there than anywhere else ?

Hard to find, but there is the STM32MP2 series announcement with 2x GB, USB 3.0 and 4 lane MIPI (at least that is what Yahoo news said about MIPI and  it is not in the ST flyer, so Yahoo seem to know more than what is on the ST website)
Personally, don't prefer such marketing practices with very limited detail. Why not just get over it, announce the whole feature spec at once with a roadmap of availability  instead of a half baked flyer.

https://finance.yahoo.com/news/stmicroelectronics-introduces-second-generation-industry-070000434.html

[Debugging]

AND AS USUAL  THE SAME ANSWER.

This is becoming a systemic issue. ST changed to use a BOT  that checks IP or bases to auto-reject  ?


We appreciate your interest in our workshop on STM32H5: Ultimate combination of performance, integration and affordability, taking place on Tuesday, May 23, 2023.

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If you have any questions, please contact us on the dedicated ST Community.

[Eternauta]

The peripherals of the new microprocessor family are truly complete. There is also PCIe and LVDS

https://www.st.com/content/st_com/en/campaigns/microprocessor-stm32mp2.html?icmp=tt32627_gl_pron_may2023

[Debugging]

Per the ST "Event" this week, MP2's will now become (more) available in 2025. It seems only some customer have some on hand. So that will be 2 years from announcement to actual availability, whatever this "availability" may actually mean. (retail ?). and still no USB 3.0... These two slides are everything that seems available now regarding MP2.

[mark03]

Wow, is the event over now?  I was just on the STM32 product page and I see the new STM32U0 series listed, but nothing else.  That could be interesting.

OTOH, none of the cutting edge stuff that I listed last year (see below) is even in vaporware phase, except for STM32N6 which has now been in "pre-launch" for TWO YEARS without even a data brief to summarize what is inside.  This suggests they are having real problems getting new silicon out the door.

I will continue to use STM32 for the foreseeable future because I can't stomach having to reverse-engineer undocumented MCUs from China just to make them work.  I am starting to suspect, however, that ST made a strategic decision to cede the MCU market to others, and is just milking their current portfolio for as long as they can.  The future is bleak

ARM must also be worried.  For anyone keeping track, it has now been more than *four* years since Cortex M55 was announced and there is still no silicon from the big players, not even pre-release announcements, unless you count coprocessors on Cortex A's.  We do have M85 from Renesas but no hint of competition from anyone else.  This is a much longer product cycle than M7 which makes you wonder if the new cores with Helium will ever see the light of day.

So the deadline is past, and although I don't have time to sit through a 1.5-hour video, I did take a look at the STM32 product page and tried a google news search for "stm32" and I don't see much in the way of new MCU development.  (The new MPUs are interesting to some, I guess.)

Still no Cortex M55 or M85 parts with the Helium SIMD.  Nothing with neural coprocess (Ethos).  Nothing exciting on the process front either (anyone remember FDSOI?).  No foray into RISC-V either.  I would need at least one of those to pique my interest.

Everyone knows there is a long lag time between ARM's announcement of new cores and real silicon, but if you compare with Cortex M7, this has already been a longer wait than normal---the M55 was unveiled more than three years ago, and there are still not even vaporware new-product announcements from ST.

That being said, they promised an update on the supply situation... Did anyone tune in to hear what they had to say?  Just being able to buy parts from their current product line would be fantastic in the near term.  But IMO a lack of new products in the pipeline bodes ill for the future.

[IOsetting]

STM32F103 and STM32F407 still work perfectly in most applications, with plenty of alternative chips in the market, I don't see a reason to move to new product lines. As for Arm and ST, their biggest challenge comes from RISC-V. The market has been quite different in China mainland after the pandemic.

[grantb5]

STM32F103 and STM32F407 still work perfectly in most applications, with plenty of alternative chips in the market, I don't see a reason to move to new product lines. As for Arm and ST, their biggest challenge comes from RISC-V. The market has been quite different in China mainland after the pandemic.

Entering this STM32 MCU game late, I was taught on the F103, but realize that's very old now. I really like the U5 series, but it's just way too big a leap for me at this point. What was the roadmap after the F4?  I get the impression it was F1 -> F4 but then what? I'd like to make a couple of generational leaps from the F1 without going too crazy. My primary usage is basic USB peripheral, but I have a LOT of stuff hanging off of GPIOs, so I appreciate things like BSRR and bit-banding (the latter of which seems to have disappeared somewhere along the line).

[SiliconWizard]

STM32F103 and STM32F407 still work perfectly in most applications, with plenty of alternative chips in the market, I don't see a reason to move to new product lines.

I don't know what "most applications" mean. This kind of assertion is always odd. What is the definition of "most applications"?
STM32 MCUs have made big gaps in terms of performance and, particularly, power consumption in more recent series than the venerable F1 and F4. If low-power is a requirement, then the F1 and F4 are certainly out of the equation, so in itself is a good reason for considering more recent series.

There are alternatives for sure, but again, when it comes to low-power and the L4/L5/U5 series, not that many either. Very few actually that come even close.

I somehow would translate your above assertion to "STM32F103 and STM32F407 can be had dirt cheap in China and we don't see any reason to use any more recent STM products, as they are much more costly for us. And we don't particularly care for low power anyway."

And with that said, with anything that doesn't require ultra-low power, I now like the WCH RISC-V-based products, but their peripherals tend not to be as flexible as what we get on STM32 MCUs in general, at least the more recent ones, as WCH tends to "clone" STM32 peripherals from older generations.

[IOsetting]

If low-power is a requirement, then the F1 and F4 are certainly out of the equation, so in itself is a good reason for considering more recent series.
There are alternatives for sure, but again, when it comes to low-power and the L4/L5/U5 series, not that many either. Very few actually that come even close.

You are right, low-power is a con of old series.

I somehow would translate your above assertion to "STM32F103 and STM32F407 can be had dirt cheap in China and we don't see any reason to use any more recent STM products, as they are much more costly for us. And we don't particularly care for low power anyway."

It's not quite true that, in addition to price, we also need to consider the stability of the supplier's delivery as well as alternative options in extreme cases.  If we put our bets on ST's new product line, there will be a significant risk.

[jnk0le]

We do have M85 from Renesas but no hint of competition from anyone else.

r0p2 revision in renesans has some serious bugs. Others probably waited for better revisions.

e.g. 3175626 (crash right after enabling DCACHE, 100% reproducible (at least when exec from SRAM)) has been confirmed by ARM only by february this year. r1p1 revision is probably around april.

STM32N6:

https://www-armbbs-cn.translate.goog/forum.php?mod=viewthread&tid=125949&extra&_x_tr_sl=auto&_x_tr_tl=en&_x_tr_hl=en&_x_tr_pto=wapp

- cortex-m55 (known from previous leaks)
- 600MHz core
- 300MHz NPU
- 64K ITCM
- 128K DTCM
- ROM/RAM is fake, looks like they put some sections at typical RAM address as to debug without flash loader implemented in debuggers (did the same thing for RA8)
There should be at least 2MiB of SRAM (0x1ffffff diff), probably more due to NPU.

OP claims release is Dec 24 which is an unlikely date due to chritstmas


STM32V8:

https://www.cnblogs.com/armfly/p/17417211.html

- cortex-m85
- 4 MiB flash
- that "EEPROM" is fake. It's at typical "non-secure" alias of FLASH


all look like leaks from cube packages

[jnk0le]

STM32N6:

https://www-armbbs-cn.translate.goog/forum.php?mod=viewthread&tid=125949&extra&_x_tr_sl=auto&_x_tr_tl=en&_x_tr_hl=en&_x_tr_pto=wapp

- cortex-m55 (known from previous leaks)
- 600MHz core
- 300MHz NPU
- 64K ITCM
- 128K DTCM
- ROM/RAM is fake, looks like they put some sections at typical RAM address as to debug without flash loader implemented in debuggers (did the same thing for RA8)
There should be at least 2MiB of SRAM (0x1ffffff diff), probably more due to NPU.

OP claims release is Dec 24 which is an unlikely date due to chritstmas

https://www.st.com/content/dam/static-page/events/ces-2024/33-efficient-ai-detection.pdf

- SRAM should be around 4 MiB (>3MiB)
- 10 MiB suggest an external flash

https://community.st.com/t5/stm32-summit-q-a/when-will-the-stm32n6-chip-be-available-for-edge-ai-applications/td-p/652576

- release claimed to be november

EDIT:

https://community.st.com/t5/stm32-summit-q-a/do-you-plan-to-add-video-codec-h-264-h265-to-mcu-h7/td-p/652404

- hardware h264 encoder

STM32V8:

https://www.cnblogs.com/armfly/p/17417211.html

- cortex-m85
- 4 MiB flash
- that "EEPROM" is fake. It's at typical "non-secure" alias of FLASH

https://www.eejournal.com/article/st-rolls-a-new-fd-soi-microcontroller-with-phase-change-memory-pcm-for-automotive-applications/

- cortex-m85 on the 18nm FD-SOI

https://community.st.com/t5/stm32-summit-q-a/stm32n6-and-general-mcu-questions/td-p/652193

- "attacking 1 GHz"

[uer166]

I wonder what that NPU memory setup is. Obviously they can't store the weights in regular SRAM, as that would load the crap out of the AHB buses and potentially contend with CPU.

Is it its' own dedicated memory? Or perhaps a couple extra SRAMs with their own ports and DMA/bus to NPU?

[hans]

Seems like ARM describes a standardized NPU peripheral:

https://developer.arm.com/documentation/102023/0000/Introduction-to-the-NPU/Description-of-the-neural-processing-unit-

I imagine it to be a binary bitstream of somekind you'll have to load into the peripheral, with the weights and a computational program (unfolding of the neural layers into matrix multiply, add, etc.). The introduction says there is an open source tool that can produce a command stream, which I suspect takes a neural network (or trains it) and then outputs this bitstream for the NPU.

From the diagrams it looks like the NPU will pull input buffers from the main bus via a (it's own?) DMA engine into a scratchpad, then do the matrix computations internally on them, and publish the final result out via DMA or maybe some register set (e.g. if the neural network only publishes a few values).

ST's marketing slides talks about a 75x speed up from presumably a standard C implementation. Even if you can do only 1 FP16 MAC per 6 cycles (2 loads, 1 mac, 1 store, 1 decrement, 1 branch-if-not-zero), then the NPU engine will have be 12x faster than that. So that makes me guess the NPU has some 256-bit vector ALU inside, maybe even more.
TinyYoloV2 uses about 6.97Billion FLOPS for 416x416 images resulting in 207fps. STM32N6 can do about 18fps => 600M FLOPS.
I suppose there is some overhead involved with swapping out matrix weights for large networks.

I wonder how long it takes till someone will abuse the NPU for DSP too. We have had SIMD on Cortex-m4, but since the registers are still only 32-bit wide, it's use is a bit limited. I suppose you could also load a matrix that treats the "matrix" operations as mostly vectored (weights only on diagonal) and implement FIR, IIR, matched filters, mixers, etc. like that.

[mark03]

I wonder how long it takes till someone will abuse the NPU for DSP too. We have had SIMD on Cortex-m4, but since the registers are still only 32-bit wide, it's use is a bit limited. I suppose you could also load a matrix that treats the "matrix" operations as mostly vectored (weights only on diagonal) and implement FIR, IIR, matched filters, mixers, etc. like that.

This.  I am not a complete AI-skeptic (I do think there is a bubble), but I have personally zero interest in embedded NPUs for their intended purpose
From cursory skimming of data sheets it has not been clear to me if DSP [ab-]uses are possible.  E.g. can I somehow use 16-bit ints or is the hardware limited to 16-bit floats.

Back to the thread topic, this STM32V8 sounds great, but as the only verifiable source is the somewhat vague comment by an ST employee on their community forums, I take that with a big grain of salt.  STM32N6 has been way more concrete than that for 2-3 years already.  The production delays have been so extreme that I assume ST ran into major problems with errata, or   That in turn has dampened my enthusiasm somewhat.