STM32405RG ADC and External FLASH problem

[syntax333]

Hi, I am sending ADC data to SPI FLASH while sampling ADC with DMA. I am using ping pong buffers so my ADC recordings are continuous.

My algorithm is something like this:

|---ADC Sampling with DMA (6.4ms)-------------|....
|Process Data||Send data to external FLASH|---|....

Everything works fine but I have strange oscillations in my ADC data. I am suspecting it caused by SPI FLASH writing since timing matches when this oscillations occur. SPI FLASH draw 10-15mA more when its writing. Maybe this causes Vcc to dip for small amount of time thus causes Vcca to be unstable. I am not sure why this is happening, has anyone encountered such a problem?

I attached an image of signal where I am sampling approximately 28V signal. I am using ferrite bead between Vcc and Vcca.

[homebrew]

Hm, it is hard to tell just by the looks of the plot ... and that 'noise' is "just" half a percent. It could have tons of reasons ...

Could you provide additional information?

1) Where is your Vref coming from?
2) Could you post an image of the relevant part of the layout?
3) Maybe also the schematic for the analog frontend?

[syntax333]

I attached a file which shows my problem better. I just increased the number of samples that DMA transfers from ADC thus increase SPI FLASH write time.

STM32405RG does not have extra Vref pin. For Vref Vdda is used and its coming from Vcc. I connected ferrite bead between Vcc and Vdda.

There is nothing on layout just input signal -> voltage divider -> uC ADC pin nothing is near to these components.

On graph X axis is time in seconds and Y axis is Voltage. I am measuring approximately 27V.

[AlexD]

You could try to measure your Vdda voltage with an oscilloscope in AC coupling mode. For the best results you might want to use a ground spring and measure across the Vdda capacitor

I assume your Vdda pin also has a capacitor? If so, what value does it have.
Also what Ferrite bead have you used? Could you provide a Datasheet, or at least the specified resistance at 100MHz.

It would be best if you could also show your layout. If it is really the SPI Flash supply current, that causes the noise, maybe you need separate supply and ground routing for the µC and the flash and connect them at only one point.

[Alti]

This is not an ADC noise.
It looks to me that Vref is varying (it goes down a bit) making same voltage result in higher conversion value.

[syntax333]

Yes I scoped Vcc while sampling ADC and writing data to FLASH, noise seems to occur when FLASH is used. Probably current surge caused by current demands of FLASH.

Is using separate voltage source for Vdda and Vcc only solution? Would using External Voltage reference chip help this type of problems?

[homebrew]

STM32405RG does not have extra Vref pin. For Vref Vdda is used and its coming from Vcc. I connected ferrite bead between Vcc and Vdda.

Ok, you are using the LQFP64 variant, haven't spotted that when looking into the datasheet. Indeed, that one doesn't have a separate Vref pin.

Did you follow the guidelines on decoupling VDDa, then? (https://www.st.com/resource/en/datasheet/stm32f405rg.pdf, Page 138)

A ferrite bead won't do that much if a decoupling capacitor is missing.

Also, how did you measure the fluctuations of VDDA with your scope? Where was the ground pin connected?
Instead of VDD becoming unstable, you could also/additionally face ground-bounce if your grounding scheme is not appropriate.

There are so many options ... maybe an image of the layout around the chip would really be helpful ...

[Alti]

If that is LQFP64 then I suggest you should get a $12 Nucleo-64 and run this ADC code on a properly designed hardware.

[syntax333]

STM32405RG does not have extra Vref pin. For Vref Vdda is used and its coming from Vcc. I connected ferrite bead between Vcc and Vdda.

Ok, you are using the LQFP64 variant, haven't spotted that when looking into the datasheet. Indeed, that one doesn't have a separate Vref pin.

Did you follow the guidelines on decoupling VDDa, then? (https://www.st.com/resource/en/datasheet/stm32f405rg.pdf, Page 138)

A ferrite bead won't do that much if a decoupling capacitor is missing.

Also, how did you measure the fluctuations of VDDA with your scope? Where was the ground pin connected?
Instead of VDD becoming unstable, you could also/additionally face ground-bounce if your grounding scheme is not appropriate.

There are so many options ... maybe an image of the layout around the chip would really be helpful ...

Yes I have followed guidelines only difference is instead of 10nF between Vdda and Vssa I have 100nF. I measured fluctuations by connecting scope to 3.3V Vcc and GND.

If that is LQFP64 then I suggest you should get a $12 Nucleo-64 and run this ADC code on a properly designed hardware.

Unfortunately I can't use dev board since I need to use external SPI Flash.