STM32MP Series

[1uk3]

Hi

I was really suprised that i couldn't find a thread about the new Cortex A7+M4 series. I somehow expected a 100 page in depth analysis 

Example datasheet of the dual core version STM32MP153A https://www.st.com/resource/en/datasheet/stm32mp153a.pdf
Most of my products contain either F0, F4, F7 or H7 so I'm really exited that ST now also covers all my needs: gigabit ethernet(AAA and AAC models) and a DDR memory.
My only concern is the bus matrix. Do you think the AXIM bus can handle a DCMI camera over the bus bridge to DDR memory and memory to GMAC at full rate + all the traffic caused by the A7 cores?

What do you think about the price of 5-10$ @ 10k?  Feels rather cheap

Greetings
Lukas

[robint91]

I'm also looking to this chip. With that price point they have something nice in there hands. Even with that GPU.

That AXIM bus does about 2 GByte/s. I don't think that would a big problem.

I have asked my local distributor for some prices and a discovery kit, hopefully I will get that maybe next week.

[1uk3]

I think they are not available yet.
The discovery kit seems nice https://www.st.com/content/st_com/en/products/evaluation-tools/product-evaluation-tools/mcu-mpu-eval-tools/stm32-mcu-mpu-eval-tools/stm32-discovery-kits/stm32mp157a-dk1.html

DCMI sits on a different bus(MLAHB) and there is an "async" bridge between them. Do you know how the asynchronous interface affects throughput?

[drojf]

Octavo also announced a SiP using the STM32MP1: https://octavosystems.com/octavo_products/osd32mp15x/

It integrates everything except flash memory that you need to run the chip. You might remember them as they make the SiP which goes in the PocketBeagle

[pymenow]

Looking at using the STM32MPX for a HW design, how is I2C buses partitioned between the Cortex M4 Microcontroller vs the A7 MicroProcessor? Can either processor access devices on these I2C buses assuming both have the required drivers enabled.