Slowing down audio playback STM32 DMA

[longh]

Hello everyone,

I'm new to STM32, and I am trying to make a project that when triggered reads audio from an ADC channel into a buffer with a ~100kHz sampling rate while at the same time reading the samples out of this same buffer into the DAC with a ~10kHz sampling rate. The end goal of this is to slow down the recorded audio from a microphone by ~10x.

I was able to get this kind of working using the DMA to load from the ADC to the buffer and from the buffer to the DAC. However, this was using a circular DMA mode so the ADC kept re-writing the buffer before the DAC could read it out. I instead want this to operate in "single shot" mode, when triggered the ADC fills up the buffer and then the DAC keeps reading from the buffer until it reaches the end. Then everything stops until triggered again. Here is my attempt to trigger the DMAs to start every 5 seconds, but it doesn't seem to be working.

https://github.com/abstractspace/stm32-audio-dma

Just thought I would reach out and see if anyone has any ideas.

Thanks,
-Hunter
 

[longh]

I think my main question is if I'm restarting the DMAs in the correct way here: https://github.com/abstractspace/stm32-audio-dma/blob/537b8251b3d1da8b30008e79e46f60e4c155c867/Core/Src/main.c#L174 after they ADC buffer if filled up. In circular mode they would restart at the beginning of the buffer automatically.

[DavidAlfa]

You need to set the ADC trigger to TRGO, enable2 continuous dma requests and DMA circular mode, peripheral to mem, configure a timer for 100KHz and select TRGO from update event.
Now, when you start the timer the ADC will also sample and store samples at that frequency.
Use the dma half-transfer and transfer-complete interrupts to take care of your buffer.

For the dac, configure another timer for 10KHz, set DMA in non-circular, non-increase mode, mem to peripheral, src address pointing to the ADC->DR and dst to the dac, that way it'll take the last ADC conversion available without requiring messing with the buffers.