Testing the RP2350B

[hans]

How narrow a pulse can one generate on the RP2350B?

I'm curious if the RP2350B can be used to commutate several brushless motors. The STM32G4, some TI and Microchip parts can do single digit nanosecond wide pulses.

I've read the PIO document section but couldn't find a clock tree to work out the details. Thanks in advance.

Perhaps my comment will be DOA: but is it necessary for BLDC drive?
E.g. I'm just about to finish a PCB design with STM32H725 which has 275MHz timers. PWM at 25kHz => 275M/25k = 11000 steps per cycle. Divide by 2 for center alignment, so still 12.4 bits. Sure 16-bit resolution is better (you'd even have to slow down the timers on STM32G4 to get 25kHz), but in my mind I would also need to have 16-bit position sensors and 16-bit current sensing to match that resolution.

Other than the RP2350B looks like a fine candidate for 1 motor drive. I've ran some tests with SimpleFOC on the RP2040, and it could only do FOC ticks at 1-2kHz or so. That library uses floating point everywhere..
The RP2350B ARM M33 core has a FPU, so that should speed things up a lot. I measured the performance on a STM32H747 nucleo, and it was processing ticks in around 3.6-3.8 us. I would expect a RP2350B to be more or less on the same magnitude (my guess probably around 10-20 us per FOC tick). The more serious FOC controllers can typically do FOC loops at tens of kHz.

The second problem I had with the RP2350B for BLDC drive is its lack of ADC channels. The QFN-60 only has 4 , the QFN-80 has 8. It wouldn't make it unusable, but I would need 1 MCU per motor. Similarily, the timers only have 2 outputs per channel and no sync at all. Iirc the SimpleFOC library solved that issue by enabling all PWM slices at once.

The Raspberry Pi Pico's are fun chips with PIO etc. but its also clear they choose not to get into the way of ST, NXP etc. for these kinds of applications. The reason ST/NXP/etc. timer peripherals are convoluted as it is, is probably because customers want to build these kinds of applications with them. E.g. if your design is controlling a H-bridge directly, then ideally you'd also want complementary PWM outputs with hardware deadtime insertion. The STM32G4 can do that with HRTIM, many STM32's with their advanced-control timers, but these Pico's can't do it at all.

[SiliconWizard]

How narrow a pulse can one generate on the RP2350B?

I'm curious if the RP2350B can be used to commutate several brushless motors. The STM32G4, some TI and Microchip parts can do single digit nanosecond wide pulses.

I've read the PIO document section but couldn't find a clock tree to work out the details. Thanks in advance.

The PIO can run at up to the system clock and so, officially, up to 150 MHz.
The cores overclock gracefully to a very high degree as discussed earlier. But of course, that doesn't mean that the IO pads will follow.
The PIO can change IO states in just one clock cycle, so you can expect a min pulse width of 6.67 ns. At 250 MHz (at which cores operate just fine), it would be 4 ns. Whether IOs have enough actual analog bandwidth, I don't know.

Since they seem to guarantee 150 MHz, I guess you can count on 150 MHz. I couldn't find any specific specs in the datasheet for IOs though.
Whether the HSTX blocks would enable you to get shorter pulse widths, you'll have to read the datasheet carefully. And the HSTX is less flexible than the PIO, it's essentially a streaming interface so you'll have to prepare all data beforehand, while the PIO can execute simple code on the fly.

But if 6.67 ns min pulse width meets your requirements, then you can absolutely use the PIO to do just about anything in more flexible ways than on a STM32G0. Now what do the "pulses" look like at 150 MHz from the RP2350 GPIOs, I don't know - yet - either. The datasheet seems to lack these specs, unless of course I missed them.

[Harjit]

@hans - my current design is around the STM32G4. My problem is that the motor time constant is extremely low, and the resistance is low. So, I think I'm going to be only using 15% of the PWM range. Then, this means I need finer resolution.

Appreciate the information the clock base for the PIO.

[iMo]

PIO runs on main_clock/2, afaik.. (at least the 2040 does)..

[SiliconWizard]

PIO runs on main_clock/2, afaik.. (at least the 2040 does)..

No, it's clocked from sys_clk directly and connects via the AHB to the CPU cores. There are fractional dividers for each state machine, but you can absolutely use 1 as a the divisor. I haven't seen any difference regarding this point with the RP2040, it was already like this.

[SpacedCowboy]

The RP2040 can do 252MHz  over its general GPIO pads with a pretty darn clear eye diagram. There's a second diagram (slightly less wonderful but still pretty clean IMHO) with it running at 372MHz.

I think the line: "Honestly, this has shaken me. This is a silly amount of bandwidth for a tiny little microcontroller." is a pretty good sum-up...

I'd expect the 2350 to not be worse, but I haven't tested it.

[phil from seattle]

The RP2040 can do 252MHz  over its general GPIO pads with a pretty darn clear eye diagram. There's a second diagram (slightly less wonderful but still pretty clean IMHO) with it running at 372MHz.

I think the line: "Honestly, this has shaken me. This is a silly amount of bandwidth for a tiny little microcontroller." is a pretty good sum-up...

I'd expect the 2350 to not be worse, but I haven't tested it.

On the raspi forum there are reports of >300MHz. YMMV

https://forums.raspberrypi.com/viewtopic.php?t=375975&start=25

[SiliconWizard]

Well someone managed 375 MHz with HSTX pins to output 720p DVI. That's DDR over HSTX meaning... 750 Mbps per pin.