I see two issues and both can be easily resolved:
First, the connector and IO device pinout will require separate .UCF files. Fine, create a master file for each board and comment out the pins that aren't used in a particular experiment. Select the lines with the mouse, right click and select the option to comment/uncomment. You will also need to come up with a way to make the physical connections. Check the two schematics for things like series resistors. The Basys2 has 200 Ohm series resistors on each pin. This helps protect the board from short circuits and helps reduce reflections.
Second, the need to multiply that 12 MHz clock by 4.166... to get it up to 50 MHz. Just multiply by 25 and divide by 6 using a DCM (Digital Clock Manager):
https://www.xilinx.com/support/documentation/application_notes/xapp462.pdfI must have missed the part where ISE has a Wizard for setting up the DCM. See around page 17. You will use the CLKFX output. I always did it the hard way...
You may find that your labs don't actually require 50 MHz and the code actually divides the clock down to values appropriate for things like baud rate. In this case, a simple change in the code for the divisor and it may work just fine.
In any event, once you have the DCM working, you can just plug it in to any project that comes along.
This is definitely workable!
There is one 'gotcha' and that is that the Basys2 uses an XC3S250 while the Elbert uses an XC3S50 which is a MUCH smaller chip:
https://www.xilinx.com/support/documentation/data_sheets/ds557.pdfversus
https://www.xilinx.com/support/documentation/data_sheets/ds312.pdfThe Basys2 has about five times the logic and 4 times the BlockRAM and this is one of the differences in price.
Over at the Elbert web site, they provide a .UCF file...