The 1GHz MCU i.MX RT1170 is available!?

[Marco]

So much processing power and no memory ... what's the point? Why don't these things have LPDDR4 interface?

[cgroen]

So much processing power and no memory ... what's the point? Why don't these things have LPDDR4 interface?

This sums it pretty much up:
(hint, it is not an "applications processor")

[Marco]

It's supposed to crossover, so it should be half of one. The lower interrupt latency seems to me the bigger feature than any crossover.

The cortex A5/A7 low power SiPs are actual crossovers.

[cgroen]

I "somewhat" managed to reconstruct the RT1170-EVK PCB file from the gerbers. The net names is of course not there and the polygons are a little "so-so".
But at least it gives some hints to the placement of caps on the back of the CPU etc....
But it would be super nice if we could get a true Altium version of the PCB (the schematics I have imported from their Orcad version, the PCB is in Allegro)

[tszaboo]

So much processing power and no memory ... what's the point? Why don't these things have LPDDR4 interface?

So you can run a PID controller with faster response time?
Or have a EtherCAT interface on a BLDC motor controller doing real time stuff?
Make a datalogger with more capabilities, like remote interface and touchscreen, without one lagging out the other?
It's entirely reasonable to work with this much memory. 

[SiliconWizard]

- It has 2MB of RAM, which is plenty for many applications.
- Processing power and available memory address two different needs.
- This is still a microcontroller, not a complex SOC made for mobile phones. It's easier to use, draws less power, has more peripherals, lower latency, etc.
- It has an SDRAM controller for more memory if required.

Cortex-A-based CPUs/SOCs target a completely different market, and they often come with annoying licensing issues, difficult and/or costly access to SDKs, etc.

This reminds me of another thread dealing with the idea of 1GHz+ MCUs. Apparently, 1GHz looks like some psychological threshold to some.

[tszaboo]

This reminds me of another thread dealing with the idea of 1GHz+ MCUs. Apparently, 1GHz looks like some psychological threshold to some.

Yes, it kind of feels like "too much power". I felt the same way, when I went to early PIC32 from small Atmels. 16MHz->80MHz was a large step, and it had soo much memory.
BTW, what's the situation with similar RISC-V MCUs. I know that technically, I could make a chip like that myself, but I just want to order "packaged chips from Digikey".

[SiliconWizard]

This reminds me of another thread dealing with the idea of 1GHz+ MCUs. Apparently, 1GHz looks like some psychological threshold to some.

Yes, it kind of feels like "too much power". I felt the same way, when I went to early PIC32 from small Atmeas. 16MHz->80MHz was a large step, and it had soo much memory.
BTW, what's the situation with similar RISC-V MCUs. I know that technically, I could make a chip like that myself, but I just want to order "packaged chips from Digikey".

Yeah, I was going to add, it was the same thing like 15 years ago with the idea of 100MHz+ MCUs. Many thought they were nonsense.

Not sure what your question is regarding RISC-V MCUs. Are you wondering about their availability? Currently there aren't many options, but a few. There are the SiFive MCUs, then a couple chinese companies (like GD) also offer RISC-V MCUs, then there is the Kendryte K210. You could start a dedicated thread for that BTW, in which people could list available off-the-shelf RISC-V CPUs/MCUs.

[cgroen]

Its pretty much the same as "you will never need more than 640 KByte" 
Seriously, it has 2 MByte SRAM inside, soon there will be a version with on-chip Flash memory (like the 1064), then you have a standalone CPU with 2 MByte of SRAM and (probably) 16 MByte of Flash. You only need a 4.7 uH inductor, two handfull of caps and a couple of resistors, and off you go!
At that is with a chip in the $10..$12 range !

[bson]

.
.
A large 0.5 pitch BGA on the other hand will almost certainly call for plugged blind vias with close to zero annulars (or microvias), which will begin to cost real money.  The usual CN prototype line ±2 mil drill precision just isn't going to cut it , and they won't do blind vias at all.
.

pcbway does both blind and buried vias (obviously at a higher cost than simple 4/6/8 layers, but still way lower than most western prices)

Ex:
6 layer, 5 pcs 100x100 mm, 6 layer, ENIG, 3/3 mil is $391,-
6 layer, 5 pcs 100x100 mm, 6 layer, ENIG, 3/3 mil and HDI Buried/Blind via is $458,-

Certainly not done on their cheap prototype lines...  Which is why it costs the same or slightly less than getting it done in the U.S. or Europe.
Although it's of course a prototype service.

[Silenos]

soon there will be a version with on-chip Flash memory

You say so? I was reading here and there in its RM and I found the "booting stage" just bleh.
Though its papers typesetting is meh, some diagrams aren't really readable, the "application" sections look really helpful.
And its USB, looks much more reasonable than stms' one.
Wondering what the errata will look like. Or are there some "interesting" issues like stm32h7 lifetime vs its temperature function - they gave an AN about it.

BTW: is HASL board with this bga289 0,8 mm viable? Or ENIG is must-have?

[cgroen]

soon there will be a version with on-chip Flash memory

You say so? I was reading here and there in its RM and I found the "booting stage" just bleh.
Though its papers typesetting is meh, some diagrams aren't really readable, the "application" sections look really helpful.
And its USB, looks much more reasonable than stms' one.
Wondering what the errata will look like. Or are there some "interesting" issues like stm32h7 lifetime vs its temperature function - they gave an AN about it.

BTW: is HASL board with this bga289 0,8 mm viable? Or ENIG is must-have?

Yes. According to the jungledrums there will be one with 8 MByte (just like the 1064 and 1024 has 4 MByte) with the flash chip internal. Not that it matter that much, its easy to have the flash sitting outside when its only a few pins (6 in total) that needs to be connected.
The Errata sheet is available, there is the "usual" stuff on M7 core and few NXP ones, not much worse that what we have been used to on NXP devices.
Interesting with the H7 and lifetime, I was not aware of that one, currently (soon) looking into the H747 for a possible project, thanks for the headsup!
Regarding HASL, I would guess that it could work if the HASL is very level, personally I always get ENIG on all I do, even simple 4 layer boards, I like gold 

[Silenos]

I had issues with finding the AN as it was hidden under such an innocent name "AN5337 STM32H7 Series lifetime estimates" which I actually associated with "life in production cycle" .
Anyway there are more with sthose h7s like ADCs performances, wonky SPI CS controls, annoying bugs in ethernet ip, rare qspi timing bug which crashes device or sth (there was even topic on this forum like a year ago) which pretty screwed me back in time as I had to redo that... that's why I became a bit... sceptical, especially with all those brand new giant semi-socs.
Known bugs > unknown bugs!

But yeah, they are totally usable, I don't even run those stms max freq, nor anything straining. They really stole my - or rather my boss' - soul  with their "value" series.  And I would really like to try out some other producers' inventions.
Those Mbs of flash on nxp device definitely will be expensive.   

[errorprone]

The imxrt1060 also has lifetime based on temperature and clock frequency.  Also seen that for the imx6 SOCs.  https://www.nxp.com/docs/en/nxp/application-notes/AN12253.pdf

[Marco]

- It has an SDRAM controller for more memory if required.

Which is just insult to injury, ancient expensive and powerhungry. It's strictly inferior to modern low power standards ... and it's not like the silicon to support the modern standard is significant on these things.

[bugnate]

Yes. According to the jungledrums there will be one with 8 MByte (just like the 1064 and 1024 has 4 MByte) with the flash chip internal. Not that it matter that much, its easy to have the flash sitting outside when its only a few pins (6 in total) that needs to be connected.

Yes, but I'd point out that an on-chip (or off-chip) QSPI flash is not going to be super-high performance and the internal flash in an H7 should run circles around it. I'd think so at least. I admit that maybe 80% of the time QSPI would be good enough as to have negligible impact. It is definitely impacts my work, at least, and the issue would make my short list. There does seem to be a real lack of I/O bandwidth in the on-chip QSPI flash case given all the horsepower in the core, IMO. (Of course there are things you can do e.g., copy to an external SDRAM but I'd rather not for cost and power reasons).

On the other hand, RT1170 has HyperBus options while only a few H7s do (which happen to not be the models I'm working with now ) which may close the gap or more, depending.

[JPortici]

What do they mean by "lifetime" exactly?

[Silenos]

Is executing from external flash even a thing? Put program in RAM, those chips have oceans of it.
I had just some sour experience with programming/booting external flash with ++20 yo flashless chips, that's why I am complaining about it.

[ali_asadzadeh]

I "somewhat" managed to reconstruct the RT1170-EVK PCB file from the gerbers. The net names is of course not there and the polygons are a little "so-so".
But at least it gives some hints to the placement of caps on the back of the CPU etc....
But it would be super nice if we could get a true Altium version of the PCB (the schematics I have imported from their Orcad version, the PCB is in Allegro)

Would you share your altium files

[cgroen]

I "somewhat" managed to reconstruct the RT1170-EVK PCB file from the gerbers. The net names is of course not there and the polygons are a little "so-so".
But at least it gives some hints to the placement of caps on the back of the CPU etc....
But it would be super nice if we could get a true Altium version of the PCB (the schematics I have imported from their Orcad version, the PCB is in Allegro)

Would you share your altium files

You got PM

[asmi]

BTW: is HASL board with this bga289 0,8 mm viable? Or ENIG is must-have?

Don't be such a cheap-ass! Electrons have rights for nice things too!

[bson]

Not that it matter that much, its easy to have the flash sitting outside when its only a few pins (6 in total) that needs to be connected.

But on the other hand you always need flash, even if it's only a boot loader, so you always start with two chips instead of one...

[bson]

Yes, but I'd point out that an on-chip (or off-chip) QSPI flash is not going to be super-high performance and the internal flash in an H7 should run circles around it.

The first thing you do is copy the part you need to RAM.  There are some complications here though, in particular you don't want PIC binaries, so the binary needs to have a portion designed to execute relocated to the external flash, copy the first small piece to RAM, like 128 bytes or something, and  jump to it; this prologue then copies the rest into RAM.  The parts running out of RAM need to be properly linked to do so, which means somewhat overly complex linker scripts to combine multiple relocations into a single flash binary.  And, the code needs to get addresses from the linker so it knows what the section sizes are for the copy.  If the flash also has pieces that don't need copying, such as rarely accessed data and various strings and such, then it's even more complicated (especially if the data is organized in any kind of pointer based graph like a tree).  It's not super complicated, just... unnecessary.

[SiliconWizard]

- It has an SDRAM controller for more memory if required.

Which is just insult to injury, ancient expensive and powerhungry. It's strictly inferior to modern low power standards ... and it's not like the silicon to support the modern standard is significant on these things.

That's just excessively opiniated and neither true not that well thought out. If you don't need the speed of LPDDR RAM (and data size, as LPDDR4 chips typically come in relatively large data sizes), you can certainly use SDRAM. SDRAM controllers are significantly simpler, themselves draw less power, and SDRAM is still developed, and available in low-power versions, such as this: https://www.winbond.com/hq/product/mobile-dram/low-power-sdr-sdram/?__locale=en

Looking at the datasheets, you can see that their typical power draw is favorable compared to typical LPDDR4.

As to cost, the product linked above is about $2.5 for a 512Mbits chip (Digikey pricing, so not the best). The cheapest LPDDR4 chip you can find (again Digikey source, for comparison) is $3, but zero stock, and likely hard to find anywhere else as well unless you are a big customer. The cheapest in stock part is about $10 (yes with much larger 4Gbits, but if you don't need that much memory, that's just more expensive and useless.) Just to give an idea of the situation.

Now that was just to explain why SDRAM was possibly not a bad choice here, for again what is still a MCU, and if you're still stuck on the idea that it is shit, you can always contact NXP.

[ali_asadzadeh]

You got PM

Thanks