Author Topic: AtmelStudio SAMD21, running slow and sysclk_init() error  (Read 1405 times)

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Offline ataradov

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Re: AtmelStudio SAMD21, running slow and sysclk_init() error
« Reply #25 on: January 31, 2019, 03:39:54 pm »
That would be consistent with my 500kHz bit banging example.
No, it is not. According to your config file, the divider is disabled. It is impossible to get 500 kHz toggle running at 1 MHz. Only if you use a timer/counter and a hardware output.

Another interesting aspect is the synchronization system, I imagine this could be tricky when debugging a tricky timing related issue.
Timing in moders MCUs is tricky anyway.

2)   ‘SYSTEM_CLOCK_SOURCE_DPLL_REFERENCE_CLOCK_OSC32K’ undeclared (first use in this function)
Just use SYSTEM_CLOCK_SOURCE_DPLL_REFERENCE_CLOCK_GCLK and configure corresponding GCLK.

My boards arrived so I'm going to populate one (that has a 32.768 kHz external crystal) and try again this time with ‘SYSTEM_CLOCK_SOURCE_DPLL_REFERENCE_CLOCK_XOSC32K’
This will also work, but don't forget to enable the XOSC32K.
Alex
 

Offline cv007

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Re: AtmelStudio SAMD21, running slow and sysclk_init() error
« Reply #26 on: January 31, 2019, 06:42:59 pm »
Quote
I just power read the 30 or so pages associated with the clock system and now have an inkling of what’s going on
I read the pages normally 30 times, and I would say another 30 times is required for me.

Just playing around, I can get my code to toggle using a template to get N cycles (duplicated str instructions inline)-

//pinN, N cycles (=N*2 toggles)
Toggle< 25,8 >(); //30 tc1 counts (includes tc1 return from start and get count) = 8Mhz/30*8 = 2.133333Mhz
Toggle< 25,512 >(); //1070 tc1 counts = 8Mhz/1070*512 = 3.828037Mhz
(I'm not sure if these numbers square away correctly, but seem reasonable)

with templates, you can get up to 900 recursions (in gcc anyway), so 900 cycles is the limit with one 'call'

Maybe it would make sense to tell everyone what is the purpose of the bit-banging, maybe there is an easy alternative waiting for you if the purpose was known. Maybe not, but who knows.


I wish the PTC peripheral was not hidden. I know there is a dragon inside, but I would like to see the dragon.
 

Offline westfw

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Re: AtmelStudio SAMD21, running slow and sysclk_init() error
« Reply #27 on: January 31, 2019, 07:59:46 pm »
Quote
So ‘SYSTEM_CLOCK_SOURCE_DPLL_REFERENCE_CLOCK_OSC32K’ is undefined, I searched valid arguments for this and found ‘SYSTEM_CLOCK_SOURCE_DPLL_REFERENCE_CLOCK_GCLK
Heh. I went through exactly that sequence/process myself...
One of the annoying bit about the clock system is the "exceptions" - the devices/etc that while perhaps they could run off of a GCLK, instead run only off of some other fixed clocks.  And not consistently between different devices.  Notably, the RTC in SAMD10 can run off of a GCLK, which I thought was really neat - microsecond and millisecond timers derived from the same 1MHz GCLK.  Except that on every OTHER SAMD chip, the RTC only runs off of one of the 32kHz clocks...
 

Offline sajattack

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Re: AtmelStudio SAMD21, running slow and sysclk_init() error
« Reply #28 on: April 23, 2019, 06:22:34 am »
Are you just trying to output a clock signal or something more complex? Outputting a clock signal to a pin is one of the features built into the GCLK system. Set up the appropriate clock for the pin (function H in the datasheet), with the OE bit set, and you're golden.

Here's an example using GCLK2 outputting 48MHz to PA16.
Code: [Select]
int main(void)
{
    GCLK->GENCTRL[2].reg = GCLK_GENCTRL_SRC(GCLK_GENCTRL_SRC_DFLL_VAL) | GCLK_GENCTRL_GENEN | GCLK_GENCTRL_DIV(1u) | GCLK_GENCTRL_OE;
    PORT->Group[0].DIRSET.reg=PORT_PA16;
    PORT->Group[0].PINCFG[16].bit.PMUXEN = 1;
    PORT->Group[0].PMUX[16 >> 1].reg |= 12;
    while(1) {}
}
 


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