Author Topic: Tutorial or information regarding DDR2 PHY on Max 10 FPGA  (Read 755 times)

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Offline Boscoe

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Tutorial or information regarding DDR2 PHY on Max 10 FPGA
« on: May 01, 2018, 09:43:14 pm »
Hi all,

I'm thinking of buying the following dev kit for the DDR" memory: https://www.altera.com/products/boards_and_kits/dev-kits/altera/kit-max-10m50-evaluation.html

I can;t find any example projects for this dev kit or any information regarding configuring the LPDDR2 on board. The SOPC builder for the PHY in Quartus is pretty scary. Does anyone have any nice accessible docs or websites for such a thing?

Thanks
Boscoe
 

Offline Scrts

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