Author Topic: STM32F103 ADC supply config  (Read 1817 times)

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Offline Khashayarfn

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STM32F103 ADC supply config
« on: April 15, 2018, 08:41:21 pm »
Hi to all

datasheet 13587 Rev 17

5.3.1 table 9 says: Vdda must be same potential as Vdd with a maximum diff of 300mV (footnote).

5.3.18 table 46 says: Vdda must be between 2.4 - 3.6 and not mentioning anything about Vdd

and  AN2834 2.2.12 says: it is desirable to have separate analog and digital supplies.
so the question is: how can i manage Vdda - Vdd <= 300mV with different supplies during opration and especially during power up?

 

and 2 other question about Vref,

 

AN2834 suggests using linear regulators but usually they have errors in different temperatures,do you suggest using reference voltage ICs?

 

also about using a separate 3.3v voltage reference ic for Vref: in table 46 of datasheet max rate for Vref is mentioned Vdda, and using different 3.3 supplies doesn't guaranty exact same 3.3000 voltage for both Vref and VDDa, is this difference going to be a problem or can i forget about it?

my supply is: SMPS DCtoDC 12-5 and in next level two separate LDOreg 5-3.3 for Vdda and Vdd
 

Offline ogden

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Re: STM32F103 ADC supply config
« Reply #1 on: April 15, 2018, 08:51:16 pm »
so the question is: how can i manage Vdda - Vdd <= 300mV with different supplies during opration and especially during power up?

Connect both supplies using diode. Make sure that @max VDD current voltage drop on that diode does not exceed 300mV.
 

Offline julianhigginson

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Re: STM32F103 ADC supply config
« Reply #2 on: April 24, 2018, 09:32:32 am »
Can't you just  run them off the same supply, but filter Vdda with a suitable chip ferrite and a collection of ceramic caps?
« Last Edit: April 26, 2018, 03:27:37 am by julianhigginson »
 

Offline imo

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Re: STM32F103 ADC supply config
« Reply #3 on: April 30, 2018, 06:48:57 pm »
Which F103?
The Vref input is available only with large 144pin packages, afaik.
Otherwise the Vref input is connected internally to Vdda.
When using two different 3.3V LDOs for Vdd and Vdda there is only a little chance they will be off by >300mV..
 

Offline ogden

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Re: STM32F103 ADC supply config
« Reply #4 on: April 30, 2018, 08:58:35 pm »
When using two different 3.3V LDOs for Vdd and Vdda there is only a little chance they will be off by >300mV..

Depends on what you consider "little chance" and "for how long", especially considering that VDDA consumption is much lower than VDD.
 

Offline imo

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Re: STM32F103 ADC supply config
« Reply #5 on: April 30, 2018, 09:09:03 pm »
An ordinary 3.3V LDO will give you 3.3V +/- 0.05V max. If not, it is broken.
The Vdd or Vdda current consumption have nothing to do with the voltage levels at the outputs of the LDOs, unless the Vdd or Vdda currents exceed the max allowed currents of the LDOs. If the currents exceed that value, the STM32 is broken.
« Last Edit: April 30, 2018, 09:40:35 pm by imo »
 

Offline Jeroen3

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Re: STM32F103 ADC supply config
« Reply #6 on: May 01, 2018, 05:37:25 am »
Vdda and Vdd must be the same power supply. You're supposed to add additional decoupling because the clocking circuitry is also powered from Vdda. (Don''t want this noise running over your board)
If you want to use a Vref on the 103 <144 pin count you will have to add this on an ADC channel and correct after sampling.
 

Offline imo

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Re: STM32F103 ADC supply config
« Reply #7 on: May 02, 2018, 03:14:13 pm »
FYI, the most complicated stuff to solve is the pcb design when talking F103 ADC.
With 2 layers pcb you most probably will get +/- 20 noise, whatever ADC supply config (including well made decoupling) you may create.
A quieter readings are, imho, possible only with 4 layers and pretty careful design, especially the stuff around analog and digital Vdd and Gnd routing.
 


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