Author Topic: VHDL: 4-bit Adder Synthesis Error  (Read 5584 times)

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Offline Abstr7ctTopic starter

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VHDL: 4-bit Adder Synthesis Error
« on: September 24, 2013, 09:59:16 pm »
I've been training myself on VHDL for digital design in the last couple of days because I've a project this semester. Today, I tried to build a 4-bit adder to implement on Basys2 board from Xilinx. I created 2 separate modules, one to implement the 'sum and carry' functions for a 1-bit adder, and another one to utilize the first module to add 4 bits iteratively. 

The synthesis didn't go well and I got a few errors and warnings that I couldn't overcome. They're:

Quote
WARNING:HDLParsers:3516 - Found error in file "C:/Users/cdtoe/Desktop/Digital Design/FPGA Basys II Projects/VHDL/FourBitAdder/Add_4_Bits.vhd".
WARNING:HDLParsers:3458 - Because of erroneous VHDL file(s), automatic determination of correct order of compilation of files in project file "C:/Users/cdtoe/Desktop/Digital Design/FPGA Basys II Projects/VHDL/FourBitAdder/Add_4_Bits_vhdl.prj" may be inaccurate. Please put the files in the project file in correct order with keyword 'nosort' at end of the project file, or compile your vhdl file(s) individually to find and fix the error(s) in your vhdl file(s).
Compiling vhdl file "C:/Users/cdtoe/Desktop/Digital Design/FPGA Basys II Projects/VHDL/FourBitAdder/Add_4_Bits.vhd" in Library work.
ERROR:HDLParsers:164 - "C:/Users/cdtoe/Desktop/Digital Design/FPGA Basys II Projects/VHDL/FourBitAdder/Add_4_Bits.vhd" Line 53. parse error, unexpected TOKBEGIN, expecting SEMICOLON

I attached the whole project with the UCF file in a zip folder. I would be glad to see your lending hands. The version of the ISE design suite is 13.4.

 

Offline Dongulus

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Re: VHDL: 4-bit Adder Synthesis Error
« Reply #1 on: September 24, 2013, 10:15:22 pm »
No one wants to see your whole project, just give us the VHDL code.

Looks like you need a semicolon after "end component" at line 51 in Add_4_Bits.vhd.
 

Offline Abstr7ctTopic starter

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Re: VHDL: 4-bit Adder Synthesis Error
« Reply #2 on: September 24, 2013, 10:38:09 pm »
Yes, that's right, I forgot to add that tricky semicolon. Thanks for this one. The second problem that I'm facing now, is that I've problem with implementing the design on the Basys 2 board. I mapped the two 4 bit vectors on the 8 switches, the 4 bit sum outputs on 4 LEDs and 1 LED for the carry with the first carry, if there's one coming into in the first full adder, on one of the 4 buttons. However, none of the LEDs turn on whenever I make any addition. It's off all the time.

Edit: OK, now it works fine and dandy. These ISE tools are complicated and tricky. It's easy to fall into simple errors that can take you hours to solve until you notice how easy it's, and sometimes just by deleting and adding the UCF file again!
« Last Edit: September 24, 2013, 10:47:44 pm by Abstr7ct »
 

Offline Dongulus

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Re: VHDL: 4-bit Adder Synthesis Error
« Reply #3 on: September 27, 2013, 10:22:07 pm »
The Xilinx ISE error messages can be somewhat cryptic and unhelpful compared to other IDEs.
However, you must pay attention to the error messages because they often point you to the location even if they don't explain what the error is. In this case, I found that missing semicolon quickly because the message pointed me to line 53:

ERROR:HDLParsers:164 - "C:/Users/cdtoe/Desktop/Digital Design/FPGA Basys II Projects/VHDL/FourBitAdder/Add_4_Bits.vhd" Line 53. parse error, unexpected TOKBEGIN, expecting SEMICOLON

Sometimes, ISE will point you to a line that appears to have no problems. If this happens, check each line moving up from whichever line is giving you an error. Make sure you check spelling and check for "end" statements for ifs, cases, and processes.
 

Offline NoNRG

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Re: VHDL: 4-bit Adder Synthesis Error
« Reply #4 on: October 07, 2013, 04:46:54 am »
Edit: OK, now it works fine and dandy. These ISE tools are complicated and tricky. It's easy to fall into simple errors that can take you hours to solve until you notice how easy it's, and sometimes just by deleting and adding the UCF file again!

You can say that again. Make sure you really take a look at the project settings as well. When they aren't set correctly, errors can occur.
 


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