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The point above concerning handshaking still puzzles me though. Could you give me an example of an MCU (it's not a trick or challenge question, but a real one) that has a parallel interface peripheral that can transparently handle handshaking (compatible with "empty" and "full" states of an external FIFO) in DMA mode? (Because if you have to handle those by polling, it'll make for pretty inefficient transfers IMO, as the DMA would not directly be usable).
Quote from: SiliconWizard on November 12, 2019, 03:54:33 pmThe point above concerning handshaking still puzzles me though. Could you give me an example of an MCU (it's not a trick or challenge question, but a real one) that has a parallel interface peripheral that can transparently handle handshaking (compatible with "empty" and "full" states of an external FIFO) in DMA mode? (Because if you have to handle those by polling, it'll make for pretty inefficient transfers IMO, as the DMA would not directly be usable).The way I saw it working in the particular case I was looking at was to use a parallel port interface (50MT/s on the device I am targeting) or the external bus memory interface (66MT/s). These can be burst written from DMA. When the FIFO empties, it can be re-filled by a level change on a GPIO triggering an interrupt which restarts the DMA.
Part of me wants to see if I can get an MCU <=> FT600 to work with a small single chip FPGA solution like a Lattice MachXO2 purely as an academic exercise. The other part of me knows it's never going to find its way into a commercial product though.