That doesn't change the basic timing I described.
That seems to be something that gets overlooked- any method requires getting a value into a some register, which does not happen on its own (needs instructions to setup).
Although the set/clr/tgl registers can speed things up due to assignment-only use, their main purpose is to keep the bit manipulation atomic. The sam has these registers, which allow any code (+interrupts) to manipulate pins without the need for all code to protect the bit manipulation (since pin register bits of a port typically live inside the same register). The iobus in this case is for speed, the set/clr/tgl is for atomicity.
The port registers are usually somewhat unique in that various pieces of code can be manipulating pins which typically share a register. The addition of set/clr/tgl registers eliminate the need to interrupt protect each use. There are other pin properties that may share registers on some mcu's, such as an stm32 which cannot change a pins properties atomically (so if you manipulate these property registers the safe thing to do is interrupt protect them).
For a SAM, I believe the only port registers to otherwise worry about are the pmux registers (8bit register, shared by 2 pins), but there is a wrconfig register that can take care of dealing with pmux in an atomic way. An EFR32/EFM32 has set/clr/tgl for all peripheral registers so is easy to do any register writing atomically (whether needed or not). A Renesas RA has a set/reset port register but they also have a single PFS register for each pin that contains most of its properties/state so any manipulation is isolated to a single pin and becomes similar to the typical peripheral register (no need to protect). The Renesas library uses the PFS register for pin writes, so is rmw but no other pin is affected (they seem to only use the set/reset register for writes to multiple pins).
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