Z80 Homebrew and EPM 7032 CPLD

[FlyMario]

So I have been building a Z80 computer and on Rev 3 so far.  About to greate Rev 4 and make it more modular like the RC2014.


I have a lot of these EPM7032 CPLDs from Altera.  The pins are 5-volt tolerant yet the CPLD has a 3.3v core. I wonder if it isn't wise to use Logic Level converters on the pins coming from the Z80 or other 5v hardware.

It makes me a bit concerned that I don't find examples of these chips being used with Z80 yet it would be great to handle GLUE logic.

Any of you have suggestions or observations you could share with me?

Thanks!

[NivagSwerdna]

I just bought rather a lot of these chips with the hope of using them for custom chip replacements in old arcade games.

The only trick I believe is you have to pull up the outputs to 5V to avoid the multi-logic feature outputing 3V3.

I wish us both good luck

[obiwanjacobi]

I use the Altera Max II and found a document that describes how to use it with 5V (Chapter 8 ):
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/max2/max2_mii5v1.pdf

I have implemented it and seems to work fine.
https://github.com/obiwanjacobi/Zalt/tree/master/Decoder%20Board%20v1.0%20-%20locked

Perhaps there is a similar document for the EPM7032?

Otherwise sacrifice one for a test or two?

[NivagSwerdna]

I'm planning to use S series Max 7000....

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ds/archives/m7000.pdf

MAX 7000 device outputs can be programmed to meet a variety of
system-level requirements.
MultiVolt I/O Interface
MAX 7000 devices—except 44-pin devices—support the MultiVolt I/O
interface feature, which allows MAX 7000 devices to interface with
systems that have differing supply voltages. The 5.0-V devices in all
packages can be set for 3.3-V or 5.0-V I/O pin operation. These devices
have one set of VCC pins for internal operation and input buffers
(VCCINT), and another set for I/O output drivers (VCCIO).
The VCCINT pins must always be connected to a 5.0-V power supply.
With a 5.0-V VCCINT level, input voltage thresholds are at TTL levels, and
are therefore compatible with both 3.3-V and 5.0-V inputs.
The VCCIO pins can be connected to either a 3.3-V or a 5.0-V power
supply, depending on the output requirements. When the VCCIO pins are
connected to a 5.0-V supply, the output levels are compatible with 5.0-V
systems. When VCCIO is connected to a 3.3-V supply, the output high is
3.3 V and is therefore compatible with 3.3-V or 5.0-V systems. Devices
operating with VCCIO levels lower than 4.75 V incur a nominally greater
timing delay of tOD2 instead of tOD1.
Open-Drain Output Option (MAX 7000S Devices Only)
MAX 7000S devices provide an optional open-drain (functionally
equivalent to open-collector) output for each I/O pin. This open-drain
output enables the device to provide system-level control signals (e.g.,
interrupt and write enable signals) that can be asserted by any of several
devices. It can also provide an additional wired-OR plane.
Altera Corporation 21
MAX 7000 Programmable Logic Device Family Data Sheet
By using an external 5.0-V pull-up resistor, output pins on MAX
7000S devices can be set to meet 5.0-V CMOS input voltages. When
VCCIO is 3.3 V, setting the open drain option will turn off the output
pull-up transistor, allowing the external pull-up resistor to pull the
output high enough to meet 5.0-V CMOS input voltages. When
VCCIO is 5.0 V, setting the output drain option is not necessary
because the pull-up transistor will already turn off when the pin
exceeds approximately 3.8 V, allowing the external pull-up resistor to
pull the output high enough to meet 5.0-V CMOS input voltages.
Slew-Rate Control
The output buffer for each MAX 7000E and MAX 7000S I/O pin has
an adjustable output slew rate that can be configured for low-noise
or high-speed performance. A faster slew rate provides high-speed
transitions for high-performance systems. However, these fast
transitions may introduce noise transients into the system. A slow
slew rate reduces system noise, but adds a nominal delay of 4 to 5 ns.
In MAX 7000E devices, when the Turbo Bit is turned off, the slew
rate is set for low noise performance. For MAX 7000S devices, each
I/O pin has an individual EEPROM bit that controls the slew rate,
allowing designers to specify the slew rate on a pin-by-pin basis.

[FlyMario]

That is interesting because I use the EPM7032AEL 44 Pin and the EPM7032AETC 44 pin neither of which show a limitation from the datasheet to handling 5v logic.

Now to be honest I have had an EPM7032 for weeks now having an Arduino pulsing it with 5v.  Not convinced this means anything 

It seems I have conflicting datasheets maybe.  I am confused now.  below is the datasheet I have been working from.

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ds/m7000a.pdf 

Am I misinterpreting something that you guys notice?  I do have logic level shifters so I am not going to be that upset.  Wanted to avoid that extra circuitry lol.

Thanks,
FlyMario

[NivagSwerdna]

Inputs are fine, it's the outputs and driving old crusty TTL chips that is the only issue... and that requires the pull-ups to get safely within the family logic levels.

[tsman]

It seems I have conflicting datasheets maybe.  I am confused now.  below is the datasheet I have been working from.

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ds/m7000a.pdf

Different part. You've got a MAX7000A which has MultiVolt for all packages but NivagSwerdna has a MAX7000 which has MultiVolt for all except the 44 pin parts.

[trevatxtal]

If memory serves me right the Z80 has Tri state Data and Address lines.
But you may be aware of this. On the boards my company designed we used Tri state buffers, I possibly a 74241 or 74240. ls ver available.
Hope this helps.
Trevor

[NivagSwerdna]

Good point.  I am using EPM7128SLC84-15; hope I didn't confuse.

[nick_d]

The CMOS Z80s have 74HCT style inputs with a threshold around 1.2V, this was originally for NMOS compatibility but also means no special action is needed for 3.3V logic compatibility (since your 3.3V device is 5V tolerant).
cheers, Nick